Effect of surface roughness on electrical characteristics in amorphous InGaZnO thin-film transistors with high-κ Sm2O3 dielectrics

Effect of Oxidation Temperature on Physical and Electrical Properties of Sm2O3 Thin-Film Gate Oxide on Si Substrate

“…22,23 A similar phenomenon occurred in previous work where it was reported that RMS values decreased then increased again as the annealing temperature was increased. 23 Figure 16 shows the leakage current densityelectric field (J-E) characteristics for the investigated samples. The current-voltage (I-V) measurement results were transformed to a J-E plot.…”

“…15,20,21 Samarium oxide (Sm 2 O 3 ) is one of the promising candidate materials among such rareearth oxides because of various outstanding properties such as high dielectric constant (7 to 15), high breakdown electric field (5 MV/cm to 7 MV/cm), large bandgap (4.33 eV), low leakage current, large conduction band offset with Si, good thermal stability, low frequency dispersion, and low trapping rates. 15,20,[22][23][24] Sm 2 O 3 is also predicted to be thermodynamically stable on Si substrate. 22 Moreover, Sm 2 O 3 is less hygroscopic among the REOs because of its smaller ionic radius and less electropositive properties.…”

“…Sm 2 O 3 films have been deposited by several methods such as atomic layer deposition, 15 metalorganic chemical vapor deposition (MOCVD), 26 pulsed layer deposition (PLD), 27 thermal evaporation, 28 vacuum evaporation, 29 resistive evaporation, 30 and direct-current (DC) and radiofrequency (RF) sputtering. [22][23][24]31,32 DC and RF sputtering deposition are usually followed by postdeposition annealing (PDA) at various temperatures in oxygen or nitrogen ambient.…”

“…31 Among various PDA temperatures (100°C to 400°C), PDA at 200°C resulted in the smoothest surface and lowest leakage current due to lesser crystal defects. 23 Relatively high deposition and annealing temperatures and the metal ionic radius facilitated formation of a metal silicate interlayer. 33 The silicate interlayer will increase the equivalent oxide thickness, degrading the electrical properties.…”

Improvement of Amorphous InGaZnO Thin‐Film Transistor Using High‐k SrTa2O6 as Gate Insulator Deposited by Sputtering Method

“…In the 800 °C‐annealed polycrystalline STA thin film, many surface defects such as crack and protuberance were observed. Generally, the surface with low rms roughness value provides good electric properties . Thus, amorphous STA thin films without surface defects such as 500 °C‐annealed samples can be expected to reduce leakage current.…”