Abstract:The leakage power is expected to inc ease with scaling of CMOS technology. The increased leakage is a strong function of the elev ted temperature and voltage stress. As a consequence, under the bum-in (BI) conditions the levated leakage power may cause increased post Burnin fallout. In this paper the impact elevated leakage and technology scaling in bum-in environment on post BI yield is analy ed. We have also shown that to maintain a constant post-BI yield loss, the burn-in tempe ature should go down by lO°C … Show more
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