Effect of Mechanical Stress for Thin SiO2 Films in TDDB and CCST Characteristics

Ohno, Y.; Ohsaki, Akihiko; Kaneoka, T.; Mitsuhashi, J.; Hirayama, Makoto; Kato, T.

doi:10.1109/irps.1989.363358

Cited by 7 publications

(6 citation statements)

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“…The intrinsic lifetime of the 34 A oxidized nitride film on the cylindrical stacked capacitor, which was almost equivalent to that on the conventional stacked capacitor, was long enough for use in 256 Mbit DRAM. We conclude that the proposed single-wafer process is very [2] effective and practical for the three-dimensional capacitor formation of the next generation DRAMs.…”

Section: Results and Dicscussionmentioning

confidence: 82%

Ultrathin Silicon Nitride Films Fabricated by Single‐Wafer Processing Using an SiH2Cl2 ‐ NH 3 ‐ H 2 System and In Situ H 2 Cleaning

Kobayashi

Inaba

Ogata

et al. 1996

J. Electrochem. Soc.

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We demonstrated the formation technique of highly reliable ultrathin oxidized silicon nitride film (34 A in oxide equivalent thickness) on three-dimensional cylindrical stacked capacitor cells. In situ 112 cleaning and low-pressure chemical vapor deposition of silicon nitride using SiH3C13 and NH3 gases were successively carried out in a reactor, which can accommodate an 8 in. silicon wafer. The conduction current through the film was suppressed and the time-to-breakdown was substantially improved by the complete elimination of the bottom oxide. The intrinsic lifetime of the cylindrical stacked capacitors, which was comparable to that of the conventional stacked capacitors, was estimated to be long enough for use in 256 Mbit dynamic random access memory (DRAM). This result has revealed that the present singlewafer process is very effective and practical for the three-dimensional capacitor formation of the next generation DRAMs.

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Section: Results and Dicscussionmentioning

confidence: 82%

Ultrathin Silicon Nitride Films Fabricated by Single‐Wafer Processing Using an SiH2Cl2 ‐ NH 3 ‐ H 2 System and In Situ H 2 Cleaning

Kobayashi

Inaba

Ogata

et al. 1996

J. Electrochem. Soc.

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“…Mechanical stress is well known to cause dislocations, film cracking, and the degradation of the gate oxide. [1][2][3][4] In particular, the hightemperature processes such as oxidation and rapid thermal processing (RTP) acutely increase the development of mechanical stress, leading to device failure. Previous studies revealed that thermal-process-induced stress generates defects in the substrate and influences the data retention time of dynamic random access memory (DRAM) devices.…”

Section: Introductionmentioning

confidence: 99%

Degradation of Nitride/W/WN_x/Poly-Si Gate Stack by Post-Thermal Processes

Cho¹,

Jang²,

Kim³

et al. 2005

Jpn. J. Appl. Phys.

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We investigated the effect of post-thermal processing on the gate oxide reliability in nitride/W/WNx/polycrystalline-Si (poly-Si) gated metal-oxide-semiconductor (MOS) capacitors. As the thermal processing became severer, grater development of mechanical stress and degradation of the gate oxide were observed. Microvoids were also found at the triple point between the gate oxide and two poly-Si grains. The wide variation in mechanical stress during post-thermal processing is believed to create the microvoids and generate additional dangling and strained bonds in the oxide and at the SiO2/Si interface, resulting in the degradation of the gate oxide.

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“…The authors have reported that the reduction of mechanical stress in gate polysilicon film is an essential aspect of suppressing Manuscript dislocations at the gate edge [1], [2]. Worsened reliability because of the increase in mechanical stress in the oxide has been reported [3], [4]. Such problems have conventionally been solved by trial and error.…”

Section: Introductionmentioning

confidence: 99%

Mechanical stress control in a vlsi-fabrication process: a method for obtaining the relation between stress levels and stress-induced failures

Ikeda¹,

Ohta

Miura

et al. 2003

IEEE Trans. Semicond. Manufact.

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An ideal fabrication process is designed to minimize mechanical stress in semiconductor devices and to improve device reliability. Mechanical stress levels were predicted by in-house simulations supported by a thin-film database. These stress levels were correlated with stress-induced defects by TEM analysis supported by fail bit addressing on matured megabit SRAMs. Amorphous-doped silicon film with various annealing temperatures were used for the gate electrode to change the mechanical stress in devices and to get the direct relationship between predicted stress levels and stress related defects. The authors describe brief guidelines for suppressing dislocations in the small geometry shallow-trench isolation process utilizing this system. Polysilicon thickness in the W-polycide gate electrode is designed to minimize mechanical stress in the gate oxide and to suppress the gate oxide failure in probe and class tests. Moreover, critical stress generates dislocations during post source/drain ion implantation anneal obtained by a ball indentation method. This indicated that lower temperature anneal is effective in suppressing the dislocations. A two-step anneal was introduced to suppress dislocations and to enable higher ion activation.

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Effect of Mechanical Stress for Thin SiO2 Films in TDDB and CCST Characteristics

Cited by 7 publications

References 0 publications

Ultrathin Silicon Nitride Films Fabricated by Single‐Wafer Processing Using an SiH2Cl2 ‐ NH 3 ‐ H 2 System and In Situ H 2 Cleaning

Ultrathin Silicon Nitride Films Fabricated by Single‐Wafer Processing Using an SiH2Cl2 ‐ NH 3 ‐ H 2 System and In Situ H 2 Cleaning

Degradation of Nitride/W/WN_x/Poly-Si Gate Stack by Post-Thermal Processes

Mechanical stress control in a vlsi-fabrication process: a method for obtaining the relation between stress levels and stress-induced failures

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Effect of Mechanical Stress for Thin SiO2 Films in TDDB and CCST Characteristics

Cited by 7 publications

References 0 publications

Ultrathin Silicon Nitride Films Fabricated by Single‐Wafer Processing Using an SiH2Cl2 ‐ NH 3 ‐ H 2 System and In Situ H 2 Cleaning

Ultrathin Silicon Nitride Films Fabricated by Single‐Wafer Processing Using an SiH2Cl2 ‐ NH 3 ‐ H 2 System and In Situ H 2 Cleaning

Degradation of Nitride/W/WNx/Poly-Si Gate Stack by Post-Thermal Processes

Mechanical stress control in a vlsi-fabrication process: a method for obtaining the relation between stress levels and stress-induced failures

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Degradation of Nitride/W/WN_x/Poly-Si Gate Stack by Post-Thermal Processes