Effect of channel thickness on electrical performance of amorphous IGZO thin-film transistor with atomic layer deposited alumina oxide dielectric

Li, Y.; Pei, Yanli; Hu, Rong; Chen, Zimin; Zhao, Yi; Shen, Zhen; Fan, Bingfeng; Liang, Jun; Wang, G.

doi:10.1016/j.cap.2014.04.011

Cited by 66 publications

(28 citation statements)

References 19 publications

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“…As we know, the top-gate insulator is deposited directly on the surface of the active layer, which would deteriorate the dielectrics/active interface, whereas bottom GI has been already deposited before active layer deposition. To note that, as the active layer decreased to 20nm, the mobility of single-gate mode decreased and the threshold voltage increased and SS improved, which might be related to the enhancement of vertical electric field as the active layer gets thinner [13].…”

Section: Resultsmentioning

confidence: 98%

“…As the active layer thickness decreased from 40nm to 20nm, the ΔVTH under PBS increased from 0.77V to 1.57V and from 0.86V to 1.38V in BG Mode and TG Mode, respectively. The vertical electric field is getting stronger as the active layer is thinner when applied the same gate stress bias [13], thus electron-trapping happens easier and results in larger ΔVTH. Moreover, an abnormal positive VTH shifts under NBS with +0.25V, +0.29V and +0.13V in TG, BG and DG Mode, respectively, which could be associated with iron migration near the channel/insulator interface toward gate electrodes [16], as the stronger vertical electric field in thinner active channel.…”

Section: Resultsmentioning

confidence: 99%

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P‐13: Electrical Characteristics and Stability of Double‐Gate a‐IGZO Thin Film Transistors with Self‐Aligned Top‐Gate

Zhang

Yang

Zhou

et al. 2018

Symp Digest of Tech Papers

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Section: Resultsmentioning

confidence: 98%

Section: Resultsmentioning

confidence: 99%

P‐13: Electrical Characteristics and Stability of Double‐Gate a‐IGZO Thin Film Transistors with Self‐Aligned Top‐Gate

Zhang

Yang

Zhou

et al. 2018

Symp Digest of Tech Papers

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“…This behavior is due to the fact that the densities of interface traps at the ITZO/etch-stopper area are lessened as the TITZO increases [27]. It is commonly known that the SS is the direct parameter by which to evaluate the integration of trap state densities in the ITZO film and corresponding interfaces [28]. The results further imply that the interface quality is directly related to the device properties.…”

Section: Resultsmentioning

confidence: 99%

Understanding the Role of Temperature and Drain Current Stress in InSnZnO TFTs with Various Active Layer Thicknesses

et al. 2020

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Thin-film transistor (TFT) devices composed of metal oxide semiconductors have attracted tremendous research attention globally in recent years. Owing to their ability to offer mobility, metal oxide semiconductor materials can enable high-performance TFTs for next-generation integrated display devices. Nevertheless, further breakthroughs of metal oxide TFTs are mainly obstructed by their long-term variability, the reason for which is not yet fully understood. Herein, TFTs based on InSnZnO (ITZO) with various thicknesses (TITZO) were prepared and their long-term stabilities under test temperatures and drain current stress were investigated. The results indicate that ITZO TFTs exhibit outstanding electrical properties regardless of the TITZO, including a high saturated mobility of over 35 cm2V−1s−1 and sharp subthreshold swing. Note that the transfer and output characteristic curves of the device with a thick TITZO of 100 nm express an abnormal current surge when high gate and drain voltages are exerted, which is attributed to the floating body effect, caused when the imposed electric field induces impact ionization near the drain side. More interestingly, these drain current stress results further suggest that the abnormal shift behavior of the electrical properties of the ITZO TFTs with a TITZO of greater than 75 nm is observed to deteriorate gradually with increasing temperature and drain current bias. This study addresses that such a degradation effect should be restrained for the operation of high-mobility devices.

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“…In general, the electric potential exponentially declines inside the active layer and has a maximum transfer length called the Debye length. In terms of a-IGZO TFT, a Debye length of ≈40 nm is calculated based on a previous publication [30]. In case of a-IGZO TFT with the T IGZO = 25 nm, the channel layer is totally depleted under the negative V GS bias since the T IGZO is less than the Debye length.…”

Section: Resultsmentioning

confidence: 99%

Exploring the photoleakage current and photoinduced negative bias instability in amorphous InGaZnO thin-film transistors with various active layer thicknesses

Wang¹,

Furuta²

2018

Beilstein J. Nanotechnol.

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The photoleakage current and the negative bias and illumination stress (NBIS)-induced instability in amorphous InGaZnO thin-film transistors (a-IGZO TFTs) with various active layer thicknesses (T IGZO) were investigated. The photoleakage current was found to gradually increase in a-IGZO TFTs irrespective of the T IGZO when the photon energy of visible light irradiation exceeded ≈2.7 eV. Furthermore, the influence of the T IGZO on NBIS-induced instability in a-IGZO TFTs was explored by the combination of current–voltage measurements in double-sweeping V GS mode and capacitance–voltage measurements. The NBIS-induced hysteresis was quantitatively analyzed using a positive gate pulse mode. When the T IGZO was close to the Debye length, the trapped electrons at the etch-stopper/IGZO interface, the trapped holes at the IGZO/gate insulator interface, and the generation of donor-like states in an a-IGZO layer were especially prominent during NBIS.

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Effect of channel thickness on electrical performance of amorphous IGZO thin-film transistor with atomic layer deposited alumina oxide dielectric

Cited by 66 publications

References 19 publications

P‐13: Electrical Characteristics and Stability of Double‐Gate a‐IGZO Thin Film Transistors with Self‐Aligned Top‐Gate

P‐13: Electrical Characteristics and Stability of Double‐Gate a‐IGZO Thin Film Transistors with Self‐Aligned Top‐Gate

Understanding the Role of Temperature and Drain Current Stress in InSnZnO TFTs with Various Active Layer Thicknesses

Exploring the photoleakage current and photoinduced negative bias instability in amorphous InGaZnO thin-film transistors with various active layer thicknesses

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