Effect of Cell Placement on Single-Event Transient Pulse in a Bulk FinFET Technology

Characterization of charge sharing induced by high LET heavy ions using inverter chains in a commercial bulk FinFET process

“…The 'Input' signal of all inverter chains shown in figure 1 is tied to logic '0' during heavy ion experiments. Because vertical charge sharing is becoming as important as that in horizontal FinFET technology [14], every two neighboring inverters in an inverter chain are separated vertically. In order to observe horizontal charge sharing between each group, the same number of inverter chains in every two sequential groups is placed horizontally abutted, which is similar to that in our previous work [8].…”

“…Figure 3 shows the on-chip SET measurement circuit, which is the same as that in our previous work [14], and of which the operating principle is similar to that proposed by Narasimham et al [16]. To capture the SEMT with nine SET measurement circuits, the signal 'HOLD' generated from each trigger circuit in the control section is connected to an OR tree to generate a new 'HOLD' signal to drive the latching section.…”

“…The test platform used in the experiment was similar to our previous platform [14,15], which is shown in figure 5. There were two printed circuit boards connected to each other via a cable, as shown in figure 6, one of which was equipped with a field programmable gate array (FPGA) to provide the control command to the test chip and record SET and SEMT results from the test chip, while the other was used to load the test chip.…”

“…The sensitive area of the FinFET transistor is cut down compared to the planar transistor, which lowers the SET sensitivity [10] and the SET pulse width of FinFET transistors is also reduced compared with planar transistors [11] according to simulation results by three-dimensional (3D) technology computer aided design tools. As more and more experimental results are reported [12][13][14][15], the SET sensitivity and response of FinFET devices are being characterized more and more clearly, and the need to characterize SEMT sensitivity and SEMT response of FinFET devices is becoming more and more urgent.…”