Edge potential effect on the operation of short‐channel devices

Abstract

We have solved the two‐dimensional Poisson's equation for short‐channel device under the assumption that even in the absence of drain‐to‐source voltage (VDS), a potential occurs at the edges (source/drain) due to discontinuity at the semiconductor – channel interface in addition to built‐in‐potential. We have developed some new relations governing the operation of short‐channel devices. Analysis of relation shows that in the absence of drain‐to‐source voltage (or for very low drain‐to‐source voltage), the position of minimum potential will occur exactly at the middle of the channel. The short‐channel effect is not only observed due to applied drain‐to‐source voltage, but also due to edge potential when no bias is applied between drain and source.

Design and Analysis of InP/InAs/AlGaAs Based Cylindrical Surrounding Double-Gate (CSDG) MOSFETs With La2O3 for 5-nm Technology

“…Under investigation, the carrier mobility increases when the channel charge density is less than 2.6×10 12 cm -2 . Thus, mobility drops when there is a further increase in carrier density [51][52][53].…”

Study of avalanche breakdown (MI) mode in sub micron MOSFET device

“…The high field reliability endurance of short-channel MOS devices will be still a critical constrain. In short channel device high electric field near the drain region causes a large gate current, substrate current and substantial threshold voltage shift (Singh et al, 2003;Takeda and Suzuki, 1983;Fjeldly and Shur, 1993;Einspruch and Glidenblat, 1989). Hot electron generation and drain breakdown imposes serious limitations on the performance of the short devices (Laux and Gaensslen, 1987;Wong and Cheng, 1993;Wong, 1995).…”