Dynamically Reconfigurable Split Cache Architecture

Coutinho, Luiza Maria Novais; Mendes, José Leandro D.; Martins, Carlos Augusto Paiva da Silva

doi:10.1109/reconfig.2008.46

Cited by 5 publications

(1 citation statement)

References 16 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Most of them [3], [26], [8] are devoted to the analysis of theoretical proposals and the simulation of reconfigurable caches, only a few are devoted to the physical implementation of the proposed cache models. Zhang et al [33] proposed a reconfigurable cache architecture where the cache ways configuration could be tuned via the combination of configuration register and physical address bits.…”

Section: Related Workmentioning

confidence: 99%

Automatic cache partitioning and time-triggered scheduling for real-time MPSoCs

Chen

Huang

et al. 2014

2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)

View full text Add to dashboard Cite

Abstract-Shared cache in modern multi-core systems has been considered as one of the major factors that degrade system predictability and performance. How to manage the shared cache for real-time multi-core systems in order to optimize the system performance while guaranteeing the system predictability is still an open issue. In this paper, we present a framework that can exploit cache management for real-time MPSoCs. The framework supports dynamic way-based cache partitioning at hardware level, building task-level time-triggered reconfigurable-cache MPSoCs. It automatically determines timetriggered schedule and cache configuration for each task to improve the system performance while guarantee the realtime constraints. We evaluate the proposed framework with respect to different numbers of cores and cache modules and prototype the constructed MPSoCs on FPGA. Experiment results based on FPGA implementation demonstrate the effectiveness of the proposed framework over the state-of-the-art cache management strategies when tested 27 benchmark programs on the constructed MPSoCs.

show abstract