Dynamic Voltage Scaling for Power-aware Hierarchical Real-Time Scheduling Framework

Compositional power-aware real-time scheduling with discrete frequency levels

“…The previous work [28], which assumes that a processor continuously adjusts its speed level, will determine that the best speed level for C 1 is s c 1 = 0.77 and that for C 2 , it is s c 2 = 0.52. This should then yield a total energy consumption of E c = 1.50 × 0.77 2 + 2.90 × 0.52 2 = 1.674.…”

“…Different overheads [9,21,33] have been considered and synchronization protocols [1,20] devised for resource sharing in a compositional scheduling framework. The first work on power-aware scheduling in a compositional real-time scheduling framework by Tchamgoue et al [28] introduced system, component, and task level static schemes as well as dynamic component and task level schemes under the assumption that the processor can continuously scale its operating frequency. However, this paper assumed only processors with discrete operating speed levels and proposed and evaluated static schemes at system, component, and task levels.…”

“…A recent work [28] on power-aware scheduling in a compositional real-time scheduling framework has focused only on minimizing the power consumption of a component provided its interface and periodic resource supply were known. However, in a compositional real-time scheduling framework, the main problem has always been to define a scheduling interface model in order to specify the collective resource and deadline requirements of a component.…”

“…When the system is set up, each component of the framework transmits its interface information to its upper-layer component. In order to determine its interface, we assume that each component makes use of our previous work [28], which provides optimal speed level given a resource supply to a component, to compute the optimal resource supply for each speed level supported by the processor. 2.…”

“…Tchamgoue et al [28] introduced static and dynamic scheduling algorithms that determine optimal processor speeds at system, component, and task levels to minimize the total power consumption with real-time guarantee for all tasks. Provided that the resource period and capacity are known for each component, existing algorithms yield optimal speed levels assuming that the processor can continuously adjust its operating frequency at runtime.…”