Dynamic Self-Checking Techniques for Improved Tamper Resistance

Horne, Bill G.; Matheson, Lesley R.; Sheehan, Casey; Tarjan, Robert E.

doi:10.1007/3-540-47870-1_9

Cited by 104 publications

(101 citation statements)

References 13 publications

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“…Our guards, which modify code depending on other code, offer several advantages over the software guards proposed by Chang and Attalah [4] and the those from Horne et al [9]:…”

Section: White-box Attacksmentioning

confidence: 95%

“…If one would change a program at random places one could no longer guarantee the correct working of the application after modification. Several papers present the idea of self-verifying code [4,9] that is able to detect any changes to critical code. These schemes, however, do not protect against analysis of code.…”

Section: Software Security and Threatsmentioning

confidence: 99%

“…The security of the scheme relies partially on hiding the obfuscated guard code and the complexity of the guard network. Horne et al [9] discuss a related concept called 'testers', small hash functions that verify the program at run time. These testers can be combined with embedded software watermarks to result in a unique, watermarked, self-checking program.…”

Section: Tamper Resistancementioning

confidence: 99%

“…However, crashing is not very user-friendly. In the case of software guards [4,9], detection of tampering could be handled more technically by triggering another routine that for example exits the program after a random time, calls repair code that fixes the modified code (or a hybrid scheme, which involves both techniques), warns the owner about the malicious attempt through a hidden channel, . .…”

Section: Tamper Resistancementioning

confidence: 99%

See 3 more Smart Citations

Towards Tamper Resistant Code Encryption: Practice and Experience

Cappaert

Preneel

Anckaert

et al. 2008

Information Security Practice and Experience

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Abstract. In recent years, many have suggested to apply encryption in the domain of software protection against malicious hosts. However, little information seems to be available on the implementation aspects or cost of the different schemes. This paper tries to fill the gap by presenting our experience with several encryption techniques: bulk encryption, an ondemand decryption scheme, and a combination of both techniques. Our scheme offers maximal protection against both static and dynamic code analysis and tampering. We validate our techniques by applying them on several benchmark programs of the CPU2006 Test Suite. And finally, we propose a heuristic which trades off security versus performance, resulting in a decrease of the runtime overhead.

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“…Our guards, which modify code depending on other code, offer several advantages over the software guards proposed by Chang and Attalah [4] and the those from Horne et al [9]:…”

Section: White-box Attacksmentioning

confidence: 95%

Section: Software Security and Threatsmentioning

confidence: 99%

Section: Tamper Resistancementioning

confidence: 99%

Section: Tamper Resistancementioning

confidence: 99%

See 2 more Smart Citations

Towards Tamper Resistant Code Encryption: Practice and Experience

Cappaert

Preneel

Anckaert

et al. 2008

Information Security Practice and Experience

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“…Numerous protection schemes have been proposed to address this issue including watermarking, tamper-resistance, and obfuscation [16]. Tamper resistance allows a program to validate its own integrity and to cease operation if it has been modified [17]- [19]. Watermarking incorporates a developer signature into a program to detect intellectual property theft and reuse [20], [21].…”

Section: Related Workmentioning

confidence: 99%

A flexible design flow for software IP binding in commodity FPGA

Gora

Maiti

Schaumont

2009

2009 IEEE International Symposium on Industrial Embedded Systems

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This work proposes a novel design flow for SWIP binding on a commodity FPGA platform lacking specialized hardcore security facilities. We accomplish this by leveraging the qualities of a Physical Unclonable Function (PUF) and a tight integration of hardware and software security features. A prototype implementation demonstrates our design flow's ability to successfully protect software by encryption using a 128 bit FPGA-unique key extracted from a PUF. Based on this proof of concept, a solution to perform secure remote software updates, a common challenge in embedded systems, is proposed to showcase the practicality and flexibility of the design flow.Index Terms-Design flow, firmware, field programmable gate arrays (FPGA), intellectual property, physical unclonable function, secure embedded systems, security, software binding.

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Annotated Bibliography

2011

Information Security

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Dynamic Self-Checking Techniques for Improved Tamper Resistance

Cited by 104 publications

References 13 publications

Towards Tamper Resistant Code Encryption: Practice and Experience

Towards Tamper Resistant Code Encryption: Practice and Experience

A flexible design flow for software IP binding in commodity FPGA

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