Dynamic Power-Performance Adjustment on Clustered Multi-Threading Processors

Chen, Jingwei; Shen, Li; Wang, Zhiying; Li, Ning; Xu, Yemao

doi:10.1109/nas.2016.7549399

Cited by 1 publication

(2 citation statements)

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“…Core 1 continues to complete the instructions in the pipeline. When the trace runs 10,10,10,11,12,13,13,14,16,16 History length (bits) 4,9,13,24,37,53,91,145,256,359 to the instruction that the migration finish (we call this instruction Migration Over Point -MOP) on core 1, core 2 waits core 1 finish the remaining instructions and returns registers, dirty cache blocks. Then core 1 stop running trace, core 2 continues to run the remaining trace.…”

Section: Simulation Setup and Methodologiesmentioning

confidence: 99%

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Improving Branch Prediction for Thread Migration on Multi-core Architectures

Zhang

Zhou

Huang

et al. 2017

Lecture Notes in Computer Science

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Thread migration is ubiquitous in multi-core architectures. When a thread migrates to an idle core, the branch information of the branch predictor on the idle core is absent, which will lead to the branch predictor works with comparatively low predicition accuracy until the warm-up finish. During the warm-up period, the branch predictor spends quite a lot of time on recording branch information and often makes mispredictions. These are the main performance impact of thread migration. In this paper, we point out that, when a thread migrates to an idle core, the prediction accuaracy can be improved by migrating branch history information from the source core to the target. Moreover, several migration strategies are introduced to fully exploit the performance of branch prediction migration. Experiment results show that, compared to the experiment baseline which dosen't migrate any branch history information, branch prediction migration reduces MPKI of the branch predictor on new core by 43.46% on average.

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