Dynamic Idd test circuit for mixed signal ICs

Arguelles, J.; Rivero, Marı́a J.; Bracho, S.

doi:10.1049/el:19940343

Cited by 28 publications

(9 citation statements)

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“…Then, the overall magnitude of output waveform is approximated by (4) to combine the effects introduced by slew-rate limitation and magnitude response due to the first harmonic of applied testing stimulus.…”

Section: Overview Of the Proposed Testing Schemementioning

confidence: 99%

“…The observability of the supply current can be easily achieved by measuring the voltage drop. But this method has a shortcoming of impacting the effective supply voltage range seen by the device under test (DUT) and requires precise current sources [4,10]. A built-in self test (BIST) scheme effectively configures the op amp as a voltage follower and a comparator to detect its slew rate deviation and signal propagation delay deviation, respectively [19].…”

Section: Introductionmentioning

confidence: 99%

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Digital-Compatible Testing Scheme for Operational Amplifier

Ting

2012

J Electron Test

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This paper presents a digital-compatible testing scheme for operational amplifier (op amp). In the proposed scheme, the op amp device under test (DUT) is configured to a unity-gain buffer which is responded to a testing pulse, could be realized by a ring oscillator circuit. The output of the configured unity-gain buffer is digitized by simple digital counter and then the digitized counting number is compared to a predetermined critical value to evaluate the op amp DUT. The digitized counting number is sensitive to the specification of op amp DUT and easily to be observed in the digital domain. The testing parameters of testing setup of stimulus, testing result, testing accuracy, and testing time are also investigated to detail the proposed scheme. Digital compatibility and simplicity are main advantages of the proposed testing scheme. In addition, no complicated analog comparator and reference voltages are required. Behavioral and circuit level simulations are performed to show the effectiveness of the proposed scheme.

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Section: Overview Of the Proposed Testing Schemementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Digital-Compatible Testing Scheme for Operational Amplifier

Ting

2012

J Electron Test

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“…Figure 1 shows the basic diagram of the circuit that we have designed [16], to implement the built-in dynamic sensor, namely BIDCS. The quiescent current sink and dynamic current coupling block in the BIDCS is distributed among the various functional blocks in the MSIC, and, because of differences in the current consumption between the analog and digital parts of a MSIC, different sink-coupling blocks have been used for each type of functional block.…”

Section: W/lhmentioning

confidence: 99%

“…A new dynamic supply current coupling method has been proposed [16] to address this problem. It is based on biasing current mirrors and takes advantage of the parasitic capacitances associated with such structures to implement the dynamic supply current coupling block.…”

Section: W/lhmentioning

confidence: 99%

Signature analysis for fault detection of mixed-signal ICs based on dynamic power-supply current

Arguelles

Bracho

1996

J Electron Test

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In this paper we have investigated a unified and simultaneous fault detection method for mixed-signal integrated circuits. The method is based on the analysis of the power-supply current through the circuit under test. The analysis has been done paying attention to the dynamic behaviour of the power-supply current, in order to avoid measurement problems related to the large amount of quiescent current drop across many analog blocks.The analysis of the dynamic power-supply current entails certain problems related to the complexity of the measurement process, especially those due to the high speed of the current transients. These problems have been addressed by considering a design for test procedure based on the use of built-in dynamic current sensors.The goal of the design for test methodology proposed is to represent the Iddt through the mixed-signal IC under test by a digital signature~ The paper presents some advantages of this approach such as a good tolerance to crosstalk noise and the need for only a conventional digital tester on the complete mixed-signal IC for fault detection. The analysis is illustrated with some test results.

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“…For circuits with high quiescent currents, a possibility is to measure transients using specific built-in dynamic current sensors. The sensor proposed in (Argüelles, 1994) is shown in figure 13. It can be used to measure the dynamic current across the most sensitive branches of the circuit under test.…”

Section: Current Testingmentioning

confidence: 99%

Test and Design-for-Test of Mixed-Signal Integrated Circuits

Lubaszewski

Huertas

Information Technology

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Although most electronic circuits are almost entirely digital, many include at least a small part that is essentially analog. This is due to the need to interface with the real physical world, that is analog in nature. As demanding market segments require ever more complex mixed-signal solutions, high quality tests become essential to meet circuit design specifications in terms of reliability, time-to-market, costs, etc. In order to lower costs associated to traditional specification-driven tests and, additionally, achieve acceptable fault coverages for analog and mixed-signal circuits, it is reasonable to expect that no other solution than a move towards defect-oriented design-for-test methods will be applicable in the near future. Therefore, testing tends to be dominated by embedded mechanisms to allow for accessibility to internal test points, to achieve on-chip test generation, on-chip test response evaluation, or even to make it possible the detection of errors concurrently to the circuit application. Within this context, an overview of existing test methods is given in this chapter, focusing on design-for-testability, built-in self-test and self-checking techniques suitable for the detection of realistic defects in analog and mixedsignal integrated circuits.Analog and mixed-signal test, fault modelling, fault simulation, test generation, defect-oriented test, design-for-test, design-for-testability, built-in self-test, self-checking circuits. Abstract:Keywords:

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Dynamic Idd test circuit for mixed signal ICs

Cited by 28 publications

References 0 publications

Digital-Compatible Testing Scheme for Operational Amplifier

Digital-Compatible Testing Scheme for Operational Amplifier

Signature analysis for fault detection of mixed-signal ICs based on dynamic power-supply current

Test and Design-for-Test of Mixed-Signal Integrated Circuits

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