DRiLLS: Deep Reinforcement Learning for Logic Synthesis

Hosny, Abdelrahman; Hashemi, Soheil; Shalan, Mohamed; Reda, Sherief

doi:10.1109/asp-dac47756.2020.9045559

Cited by 71 publications

(61 citation statements)

References 9 publications

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“…The authors could generate the best designs for three large scale circuits, beating the state-of-the-art logic synthesis tools. In [16], a deep reinforcement learning approach for exact logic synthesis is presented. The authors have used A2C reinforcement learning algorithm to determine the order of applying optimization commands (among a few candidate commands) to a given circuit for achieving better QoR.…”

Section: Related Workmentioning

confidence: 99%

“…The authors have used A2C reinforcement learning algorithm to determine the order of applying optimization commands (among a few candidate commands) to a given circuit for achieving better QoR. Similar to [15], in [16], the goal is to remove the human guidance and expertise from the process of logic synthesis. In this paper, we present Deep-PowerX, which provides low-power and area-efficient approximate logic solutions while benefiting from state-of-the-art deep learning algorithms to offer significant improvements on QoR (power, area, delay, and runtime).…”

Section: Related Workmentioning

confidence: 99%

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Deep-PowerX

Pasandi¹,

Peterson²,

Herrera³

et al. 2020

Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design

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This paper aims at integrating three powerful techniques namely Deep Learning, Approximate Computing, and Low Power Design into a strategy to optimize logic at the synthesis level. We utilize advances in deep learning to guide an approximate logic synthesis engine to minimize the dynamic power consumption of a given digital CMOS circuit, subject to a predetermined error rate at the primary outputs. Our framework, Deep-PowerX 1 , focuses on replacing or removing gates on a technology-mapped network and uses a Deep Neural Network (DNN) to predict error rates at primary outputs of the circuit when a specific part of the netlist is approximated. The primary goal of Deep-PowerX is to reduce the dynamic power whereas area reduction serves as a secondary objective. Using the said DNN, Deep-PowerX is able to reduce the exponential time complexity of standard approximate logic synthesis to linear time. Experiments are done on numerous open source benchmark circuits. Results show significant reduction in power and area by up to 1.47× and 1.43× compared to exact solutions and by up to 22% and 27% compared to state-of-the-art approximate logic synthesis tools while having orders of magnitudes lower run-time.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Deep-PowerX

Pasandi¹,

Peterson²,

Herrera³

et al. 2020

Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design

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“…Last but not least, while initialization of design space exploration is important for the final convergence, it is difficult to initialize the search for unseen designs effectively. example, various of machine learning (ML) techniques have been used to automatically configure the tool configurations of industrial FPGA toolflow [6,9,10,14,15] and ASIC toolflow [4,5,7,12]. These works focus on end-to-end tool parameter space exploration, which are guided by ML models trained based on either offline [7] or online datasets [6,9].…”

Section: Introductionmentioning

confidence: 99%

“…These works focus on end-to-end tool parameter space exploration, which are guided by ML models trained based on either offline [7] or online datasets [6,9]. Moreover, exploring the sequence of synthesis transformations (also called synthesis flow) in EDA has been studied in an iterative training-exploration fashion through Convolutional Neural Networks (CNNs) [4] and reinforcement learning [5]. While the design quality is very sensitive to the sequence of transformations [4], these approaches are able to learn a sequential decision making strategy to achieve better quality of results [4,5].…”

Section: Introductionmentioning

confidence: 99%

“…Moreover, exploring the sequence of synthesis transformations (also called synthesis flow) in EDA has been studied in an iterative training-exploration fashion through Convolutional Neural Networks (CNNs) [4] and reinforcement learning [5]. While the design quality is very sensitive to the sequence of transformations [4], these approaches are able to learn a sequential decision making strategy to achieve better quality of results [4,5]. In addition, neural network based image classification and image construction techniques have been leveraged in placement and route (PnR), in order to accelerate design closure in the physical design stage [16][17][18][19][20][21][22].…”

Section: Introductionmentioning

confidence: 99%

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FlowTune

2020

Proceedings of the 39th International Conference on Computer-Aided Design

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The Solution of Huawei Cloud & Noah’s Ark Lab to the NLPCC-2020 Challenge: Light Pre-Training Chinese Language Model for NLP Task

Zhang

Wang

et al. 2020

Natural Language Processing and Chinese Computing

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The performance of Large Language Models (LLMs) in reasoning tasks depends heavily on prompt design, with Chain-of-Thought (CoT) and self-consistency being critical methods that enhance this ability. However, these methods do not fully exploit the answers generated by the LLM to guide subsequent responses. This paper proposes a new prompting method, named Progressive-Hint Prompting (PHP), that enables automatic multiple interactions between users and LLMs by using previously generated answers as hints to progressively guide toward the correct answers. PHP is orthogonal to CoT and self-consistency, making it easy to combine with state-of-the-art techniques to further improve performance. We conducted an extensive and comprehensive evaluation to demonstrate the effectiveness of the proposed method. Our experimental results on six benchmarks show that combining CoT and self-consistency with PHP significantly improves accuracy while remaining highly efficient. For instance, with text-davinci-003, we observed a 4.2% improvement on GSM8K with greedy decoding compared to Complex CoT, and a 46.17% reduction in sample paths with self-consistency. With GPT-4 and PHP, we achieve state-of-the-art performances on SVAMP (91.9%), GSM8K (95.5%) and AQuA (79.9%).Preprint. Under review.

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DRiLLS: Deep Reinforcement Learning for Logic Synthesis

Cited by 71 publications

References 9 publications

Deep-PowerX

Deep-PowerX

FlowTune

The Solution of Huawei Cloud & Noah’s Ark Lab to the NLPCC-2020 Challenge: Light Pre-Training Chinese Language Model for NLP Task

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