2009
DOI: 10.1149/1.3204412
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Drain Leakage Current Evaluation in the Diamond SOI nMOSFET at High Temperatures

Abstract: This paper presents a drain leakage current I Leak comparative study between conventional and the novel SOI MOSFET structure, known as Diamond transistor, operating from room temperature up to 300 o C, regarding the same dimensions, aspect ratio, area and bias conditions, by using 3-D numerical simulations. It is shown that Diamond SOI nMOSFET presents larger drain leakage current (composed mainly by electrons) than conventional counterpart, due to its higher longitudinal electric field, which it depends on th… Show more

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Cited by 10 publications
(16 citation statements)
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(13 reference statements)
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“…, WR is equal to (W-2WT), which is the channel width of the rectangular part that composes its gate octagonal geometry, α is the angle formed by the triangular part of the hexagonal geometry of the gate octagonal region, X means the lengths of the drain/source regions, the resultant LEF at the point P of the OSM due to the drain bias (VDS) is ε //_OSM ⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗ , which is given by the vectorial sum of three LEF components, ε //1 ⃗⃗⃗⃗⃗⃗⃗ , ε //2 ⃗⃗⃗⃗⃗⃗⃗⃗ and ε //3 ⃗⃗⃗⃗⃗⃗⃗ (LCE effect) that are perpendicular to the interfaces composed by the drain/source and the silicon film regions [21,26], L is the RSM channel length and the ε //_RSM ⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗ is the LEF of the RSM (only one LEF component).…”
Section: Device's Characteristics and Structuresmentioning
confidence: 99%
See 3 more Smart Citations
“…, WR is equal to (W-2WT), which is the channel width of the rectangular part that composes its gate octagonal geometry, α is the angle formed by the triangular part of the hexagonal geometry of the gate octagonal region, X means the lengths of the drain/source regions, the resultant LEF at the point P of the OSM due to the drain bias (VDS) is ε //_OSM ⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗ , which is given by the vectorial sum of three LEF components, ε //1 ⃗⃗⃗⃗⃗⃗⃗ , ε //2 ⃗⃗⃗⃗⃗⃗⃗⃗ and ε //3 ⃗⃗⃗⃗⃗⃗⃗ (LCE effect) that are perpendicular to the interfaces composed by the drain/source and the silicon film regions [21,26], L is the RSM channel length and the ε //_RSM ⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗⃗ is the LEF of the RSM (only one LEF component).…”
Section: Device's Characteristics and Structuresmentioning
confidence: 99%
“…These new effects are: LCE, PAMDLE, DEPAMBBRE [14][15][16][17][18][19] that are able to boost its electrical performance. Some examples of this approach are the Diamond [14][15][16][17][18][19][20][21][22], Octo [23][24][25][26][27], Ellipsoidal [28] and Fish [29] The Octo layout style for MOSFETs was specially invented in order to further boost the Electrostatic Discharge (ESD) tolerance and increase the breakdown voltage (BVDS) as compared to those one found in the Diamond (hexagonal gate shape) layout style. The same effects found (LCE, PAMDLE and DEPAMBBRE) in the Diamond SOI MOSFET also exist in the OSM structure, in which the LCE in the OSM structure is more pronounced, because in this case, it is possible to find a higher resultant longitudinal electric field (LEF).…”
Section: Introductionmentioning
confidence: 99%
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“…[1][2][3] Several new planar and three-dimensional (3D) devices have been designed and studied in order to improve the electrical performance of these transistors and consequently increase the performance of the ICs. [1][2][3] Some recent examples considering Planar Devices are: Circular Gate Transistor (CGTs), [4][5][6] Wave Transistor, 7,8 Overlapping-Circular Gate Transistor (O-CGT), 9,10 Diamond Transistor [11][12][13][14][15][16] and OCTO Transistor. 17 The most studied 3D transistors are: Dual-Gate Transistor, 1,2 FinFET, 1,2 Three-Gate Transistor, 1,2 Four-Gate Transistor 1,2 and Gate-All-Around Transistor (Pillar and Cynthia).…”
mentioning
confidence: 99%