Drain Current Optimization in DIBS-Grown MgZnO/CdZnO HFET

Electroforming-Free Y2O3Memristive Crossbar Array with Low Variability

“…Then, a 150-nm-thick polycrystalline Y 2 O 3 is deposited as an insulating layer, as shown in step (b) of Figure , on the Si substrate at 100 °C with pure Ar flow of 5 sccm used in the assist ion source. The surface morphology and smoothness of as-deposited insulating Y 2 O 3 is remarkable, as reported elsewhere …”

“…The surface morphology and smoothness of as-deposited insulating Y 2 O 3 is remarkable, as reported elsewhere. 24 As observed, the similar lattice constants of Si substrate (2a Si = 10.86 Å) [30] and Y 2 O 3 (a Y2O3 = 10.60 Å) 30 play a very important role to provide better film uniformity and surface morphology of the Y 2 O 3 insulating layer, 30 on top of which BE is deposited. Lowresistivity (0.00053 Ω.cm) 31 Ga-doped zinc oxide (GZO) of 100 nm thickness is deposited on top of the insulating Y 2 O 3 layer at 100 °C with a pure Ar flow of 5 sccm in the assist ion source of the DIBS system.…”

“…Moreover, in this work, to realize a memristive crossbar array, an Si substrate is used which provides a better flat surface as compared to glass or any other ceramic substrate . Furthermore, a thin polycrystalline Y 2 O 3 is used as an insulating layer on top of the Si substrate which provides better surface uniformity and smoothness as compared to the thick layer of amorphous SiO 2 . It should be noted that a thick layer (∼200 nm) of amorphous SiO 2 does not offer the desirable surface flatness, uniformity, and smoothness, due to the nonuniform surface energy distribution, which is necessary for the bottom electrode for a high-performance memristive crossbar array.…”

Analytical Study of ZnO-based HEMT for Power Switching

“…Khan et al [19] have reported the insertion of Y 2 O 3 spacer layer between the substrate and CdZnO buffer layer in the DIBS-grown MgZnO/CdZnO (MCO) HEMT, the 2DEG mobility is enhanced by 6× as compared to that for MCO HEMT without any spacer layer. Even though the lattice matching of Si/ZnO is much better as compared to that for Si/CdZnO, we assume a maximum of 6× enhancement of µ for the DIBS-grown MZO HEMT using Y 2 O 3 spacer layer.…”

“…The performance of power HEMT is investigated for MZO system realized both by molecular beam epitaxy (MBE) as well as cost-effective sputtering systems. Further, as the electron mobility is one of the important parameters for power transistor application due to its direct proportionality to the conduction losses of the transistor, this work also qualitatively explores the impact of a thin Y 2 O 3 layer as a spacer layer in sputtered MZO heterostructure, as it is observed to enhance the electron mobility in dual ion beam sputtering (DIBS)-grown MgZnO/CdZnO heterostructure [19]. The obtained results suggest that to achieve the minimum value of P D , a device W G value of ∼205 and ∼280 mm is necessary for MZO HEMTs grown by MBE and DIBS, respectively.…”