Drain current modelling of double gate‐all‐around (DGAA) MOSFETs

Kumar, Anand; Bhushan, Shiv; Tiwari, Pramod Kumar

doi:10.1049/iet-cds.2018.5201

Cited by 10 publications

(3 citation statements)

References 18 publications

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“…)is the channel center potential given in equation ( 9) and (10). By integrating equation (38) with the cross-sectional area and full channel length, the I sub is obtained as…”

Section: Subthreshold Regionmentioning

confidence: 99%

“…As a result, bulk-silicon transistors are experiencing the same difficulties as MOSFETs due to the presence of Short Channel Effects (SCEs) [1]. To minimize these SCEs, novel device architectures such as Double gate (DG) FET [2][3][4], FinFET [5][6][7], Quadraple gate FET [8,9], and gate all around (GAA) FET [10][11][12][13][14] are introduced in the literature. However, DG FETs poses a challenge in the symmetrical alignment of the front and back gates.…”

Section: Introductionmentioning

confidence: 99%

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An analytical drain current modelling of DMGC CGAA FET: A circuit level implementation

Mudidhe,

Nistala

2023

Phys. Scr.

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The GAA FET has emerged as a promising device due to its excellent control over short-channel effects and improved electrostatic control. This manuscript presents the analytical modelling for the Dual Material Graded Channel (DMGC) Cylindrical GAA FET to characterize the drain current in linear, saturation, as well as subthreshold regions. The model incorporates the effect of supply voltage, radius, and thickness of oxide layer on the device enabling a comprehensive analysis of the device behaviour. The influence of subthreshold swing is also presented. Next, the analysis is extended to investigate the important analog performance parameters that includes transconductance and output conductance. The validation of the analytical model across a wide range of operating conditions with the simulated data is performed and observed to be a close match. Building upon the insights gained from the analytical modelling, a common source amplifier based on the DMGC CGAA FET is designed. The amplifier's performance has been optimized by carefully selecting the biasing conditions and a maximum gain value of 7.745 is achieved. Further, an improvement of 42.28% in output voltage is observed for DMGC in comparison with SMGC making it a promising device for high-performance integrated circuit design.

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“…)is the channel center potential given in equation ( 9) and (10). By integrating equation (38) with the cross-sectional area and full channel length, the I sub is obtained as…”

Section: Subthreshold Regionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

An analytical drain current modelling of DMGC CGAA FET: A circuit level implementation

Mudidhe,

Nistala

2023

Phys. Scr.

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“…阈值电压 [25] , 由图11可见, 随着栅介质常数的增大, 栅控性能变好, 沟道反型电荷密度增大, 漏源电流增加, 阈值电压逐渐减小. 模型仿真得到的 -特性与TCAD的结果 [26] 基本一致. )…”

Section: 漏源电流随栅源电压变化曲线插图为不同栅介质unclassified

A physical model of cylindrical surrounding double-gate metal-oxide-semiconductor field-effect transistor

华南理工大学¹,

华南理工大学电子与信息学院²

2021

Acta Phys. Sin.

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<sec>The cylindrical surrounding double-gate metal-oxide-semiconductor field-effect transistor (CSDG MOSFET) is formed by adding an internal control gate to the cylindrical surrounding-gate (CSG) MOSFET. The inner gate of CSDG MOSFET acts as a second gate for enhanced charge control. At present, the research of CSDG MOSFET structure is widely concerned. Compared with double-gate MOSFET, triple-gate MOSFET and CSG MOSFET, the CSDG MOSFET provides good controllability of the gate over the channel. Additionally, the device allows for higher volume inversion than CSG MOSFET, which leads to better output characteristics.</sec><sec>In order to study the electrical characteristics of CSDG MOSFET, the potential model of CSDG MOSFET is obtained by solving the two-dimensional Poisson equation in cylindrical coordinates. The effects of gate dielectric, channel length and gate dielectric thickness on the surface potential and electric field of CSDG MOSFET are studied. Besides, the drain-source current model of CSDG MOSFET is established by integrating the inverse charge along the channel. The effects of gate dielectric and gate dielectric thickness on the transconductance of CSDG MOSFET are studied. In addition, the effects of the downscaling of device parameters on the transfer characteristics and transconductance of CSDG MOSFET are studied.</sec><sec>The electrical characteristics of CSDG MOSFET are analyzed and discussed. The results show that the minimum surface potential along the channel of CSDG MOSFET decreases with the increase of gate dielectric constant of gate dielectric layer. The electric field along the channel and along the radius, drain-source current and transconductance of CSDG MOSFET increase as the gate dielectric constant increases. The threshold voltage of CSDG MOSFET decreases as the gate dielectric constant increases. Moreover, with the downscaling of device parameters, the transfer characteristics and transconductance of CSDG MOSFET decrease. The performance of CSDG MOSFET can be significantly improved by using high-k gate dielectrics. </sec>

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Analytical modelling of a Cyl-JLAM MOSFET in the subthreshold region using distinct device geometry

Misra¹,

Biswal²,

Baral³

et al. 2020

J Comput Electron

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Drain current modelling of double gate‐all‐around (DGAA) MOSFETs

Cited by 10 publications

References 18 publications

An analytical drain current modelling of DMGC CGAA FET: A circuit level implementation

An analytical drain current modelling of DMGC CGAA FET: A circuit level implementation

A physical model of cylindrical surrounding double-gate metal-oxide-semiconductor field-effect transistor

Analytical modelling of a Cyl-JLAM MOSFET in the subthreshold region using distinct device geometry

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