Down-scaling of Thin-Film Transistors: Opportunities and Design Challenges

Abstract

With the ever-increasing demands for integration of advanced electronic functions into large-area electronics, down-scaling of thin-film transistors (TFTs) becomes very necessary. The key device operational issues associated with TFT scaling, including short-channel effects (SCEs) and self-heating, are considered in this paper. Device structure engineering approaches are introduced to suppress the SCEs for designing short-channel TFTs with excellent digital and analog performance. And electro-thermal simulation results show that the self-heating in TFTs will be much more significant than that in silicon metal-oxide-semiconductor field-effect transistors (MOSFETs) due to the substrate of poor thermal conductivity. Enhancing the heat dissipation by placement of metal heat pipes in the cap dielectric layers is proved to be an effective way to deal with the heating issues.

Compact Source-Gated Transistor Analog Circuits for Ubiquitous Sensors

“…Current mirrors (CMs) are essential circuit blocks for analog circuit biasing and active loads in a multitude of signal processing, amplification and conversion applications. Device non-idealities usually limit current copying performance [51] with the numerous improvements proposed thus far generally coming at the expense of operating voltage, speed or complexity [52]. As previously noted, in emerging printed and flexible LAE circuits, minimizing components reduces area, thereby increasing reliability and ultimately yield [7].…”

Current Status and Opportunities of Organic Thin-Film Transistor Technologies

“…Gate dielectric determines the areal dielectric capacitance (C i = kε 0 /t i ) and accordingly the areal charge density in the channel (Q i ), where k is the dielectric constant relative to that of vacuum (ε 0 ) and t i is the dielectric thickness. A large C i is desired for reducing the operating voltage, enhancing the transconductance and minimizing the shortchannel effects with scaled devices [63]. It can be obtained by either decreasing t i or is increasing k. For the former, however, the gate leakage should not be increased and for the later the device performance cannot be sacrificed.…”

Walking the Route to GHz Solution‐Processed Organic Electronics: A HEROIC Exploration

“…The configuration of an OFET is more similar to that of a silicon‐on‐insulator (SOI) MOSFET, for which the analysis at the base of the definition of critical length cannot be applied . To the best of our knowledge, there is no analytical model to determine an analogous of the critical length λ for these devices, and researchers have relied on simulations and on empirical relations.…”

“…In conventional silicon electronics, the main path for heat dissipation flows through the silicon substrate, which has a thermal conductivity ≈150 W m ‐1 K ‐1 . The use of plastic substrates, or even glass, exhibiting thermal conductivities in the range 0.1–1 W m ‐1 K ‐1 , severely complicates the dissipation of the excess heat …”

“…In general, more efficient dissipation strategies should be devised in order to implement applications that require continuous operation of a device generating high power density. Some authors have proposed the integration of metal wirings and heat pipes in the dielectric layer to remove hotspots generated by excessive heat . An additional option is to adopt flexible substrates with increased thermal conductivity, in order to offer a path for heat dissipation and contain the temperature increase …”