Double-sided low-temperature joining technique for power cycling capability at high temperature

Amro, Raed; Lutz, Josef; Rudzki, Jacek; Thoben, M.; Lindemann, Andreas

doi:10.1109/epe.2005.219523

Cited by 42 publications

(9 citation statements)

References 4 publications

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“…The finished joint typically has a porosity of 80-85%, a thermal conductivity of about 250 W/mK, and electrical conductivity of 40 MS/m. The thermal and electrical conductivity are consistent with pure silver of similar porosity [98], and are significantly better than those of eutectic SnPb die attach. The adhesion strength of the sintered silver joint was also found to be higher than that of the eutectically soldered joint [97].…”

Section: Chip and Substrate Attachmentsupporting

confidence: 56%

“…Furthermore, the uniform microporous silver microstructure provided additional compliance which acted to relieve the thermo-mechanical stresses due to CTE mismatch, thus improving the joint reliability under thermal or power cycling. Joints made in this way have shown a twenty times improvement in power cycling reliability at ∆T j = 130°C over that of eutectic solder joints in standard modules, as determined from an extrapolation of the reliablilty model [98].…”

Section: Chip and Substrate Attachmentmentioning

confidence: 96%

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Power Modulation Investigation for High Temperature (175-200 degrees Celcius) Automotive Application

McCluskey¹

2007

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Section: Chip and Substrate Attachmentsupporting

confidence: 56%

Section: Chip and Substrate Attachmentmentioning

confidence: 96%

Power Modulation Investigation for High Temperature (175-200 degrees Celcius) Automotive Application

McCluskey¹

2007

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“…In [11,12], dynamic thermal parameters of semiconductors are calculated through datasheet and/or experiments, providing temperature rise of the connection point. Also, long-term experiments are reported in [13][14][15] in which the switching packages are subjected to thermal stress. The junction temperature rise is then used to obtain the average temperature as well as the difference between maximum and minimum junction temperature.…”

Section: Introductionmentioning

confidence: 99%

Efficiency of three‐level neutral‐point clamped converters: analysis and experimental validation of power losses, thermal modelling and lifetime prediction

Firouz

Bina

Eskandari

2014

IET Power Electronics

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Multilevel converters are growing fast, whereas industry needs particular tools to evaluate efficiency and performance of such converters. This study focuses on the analysis and practice of power losses in a three-level neutral-point clamped (NPC) inverter. First, a precise mathematical model for three-level inverters is introduced to be used for simulating power losses of the switches, providing AC voltage and current of each phase, voltage and current of the switches as well as both the conduction and switching losses. Further, an NPC inverter was developed to validate the analytical work by comparing experimental results with those of simulations. Additionally, the thermal modelling of semiconductors is obtained using datasheet parameters. Then, the temperature rise is further modelled using the power losses along with the thermal model in the form of RC ladder. Finally, the lifetime of semiconductors is predicted using the heating curves in line with the power-cycling concept. The measured power losses and temperatures in comparison with the presented model suggest this kind of research as an applicable replacement for expensive measuring devices.

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“…It causes crack or delamination failures in the wire bonding area or chip attaching material [1][2]. And there have been researched to reduce the temperature swing [3] The problem is that quantitative acceleration test is not easy as direct junction temperature measurement is not possible. Intermittent operating condition originated failure can be easily reproduced by excessive test condition.…”

Section: Introductionmentioning

confidence: 99%

Power cycling test of power semiconductor based on junction temperature monitoring

Choi

Lee

et al. 2014

20th International Workshop on Thermal Investigations of ICs and Systems

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Due to the TCE(thermal coefficient of expansion) mismatch, power semiconductor suffers from bonding crack and delamination due to large temperature swing. For verification of power semiconductor reliability, power cycling test is conducted. Junction temperature evaluation is most important factor which determines validity of the acceleration life test. In this paper, conceptual methodology how to evaluate the real-time junction temperature during the power cycling acceleration test was introduced. Junction temperature is evaluated by forward voltage drop measurement, and the junction temperature is real-time monitored during the power cycling test. Proposed real-time junction temperature monitoring technology was effective for the power cycling test control, and it is expected to be very effective for various applications

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Double-sided low-temperature joining technique for power cycling capability at high temperature

Cited by 42 publications

References 4 publications

Power Modulation Investigation for High Temperature (175-200 degrees Celcius) Automotive Application

Power Modulation Investigation for High Temperature (175-200 degrees Celcius) Automotive Application

Efficiency of three‐level neutral‐point clamped converters: analysis and experimental validation of power losses, thermal modelling and lifetime prediction

Power cycling test of power semiconductor based on junction temperature monitoring

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