Double patterning with multilayer hard mask shrinkage for sub-0.25 k1 lithography

Abstract

In order to reduce the overall size of device features, continuing development in the low k1 lithography process is essential for achieving the feature reduction. Although ArF immersion lithography has extended the feature size scaling to 45nm node, investigation of low k1 lithography process is still important for either ArF dry or wet lithography. Double patterning is one procedure pushing down the k1 limit below 0.25. It combines the multilayer hard mask application and resist shrinkage process to get the feature size reduced to quarter pitch of the illumination limit. In recent spin-on hard mask studies, silicon containing bottom antireflective coatings (BARC) have been developed to combine the function of reflective control and great etching selectivity to the photoresist. Trilayer resist including the photoresist, silicon containing BARC and planarizing organic underlay can improve the reflectivity by optical index tuning of dual hard mask layer effectively and reduce photoresist thickness to avoid the pattern collapse with small features. In our study, we found some interesting characteristics of trilayer resist could be used for double patterning technology and made the low k1 process more feasible. This procedure we investigated can make the feature size of half pitch reduce to 37nm and beyond at 0.92NA under ArF dry lithography. Among the resolution enhancement for ArF dry illumination, double patterning scheme, overlay controllability and pattern transfer process by reactive ion etching (RIE) will be discussed in this paper.

Simplified double patterning process with non-topcoat self-freezing resist

“…[1][2][3][4][5] The simpler dual-line process (litho-litho-etch (LLE)) 6 means that all lithographic double patterning is completed before pattern transfer to the underlying substrate, so only a single etching step is needed. The LLE process obviates the low throughput disadvantage of the dual-trench LELE process, which requires two lithography processes and two etching processes.…”

Double Patterning Using Multilayer Hard Mask Process with Perhydropolysilazane

“…The DP process can be used to fabricate a finer pattern below the k1-factor of 0.25 by the combination of plural patterns formed individually. [1][2][3][4][5][6][7][8] Immersion lithography with a high-index fluid and extreme ultraviolet (EUV) lithography were proposed as the other candidates. However, these techniques still have many crucial problems that must be solved for their actual usage.…”

Anti-reflective coating for multipatterning lithography

“…This method allows for tighter pattern density while eliminating the need to print smaller structures. Several processes have been suggested in the literature 1,2 . The least favorable yet more straightforward process involves a lithography step followed by etching, followed by a second litho-etching series.…”