Double Gate Heterostructure Based Tunnel FET with 51.5 mV/decade Subthreshold Slope

Kaur, Gagandeep; Singh, Gurmohan; Kaur, Manjit

doi:10.9790/4200-0605015359

Cited by 1 publication

(1 citation statement)

References 22 publications

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“…According to International Technology Roadmaps for Semiconductors (ITRS) [3], new material and devices are required that can be integrated with the current silicon-based technology in near future. The silicon on insulator (SOI) MOSFET, Multiple-gate field-effect transistor (MGFET), FinFET [4], Tunnel FET [5], Nanowire FET [6], Single electron transistor (SET) [7], and CNFETs [8][9][10][11] are the emerging solutions to planar bulk MOSFETs providing better control on the drain potential over the channel. The best replacement for silicon is semiconducting CNTs because of their properties like lower power consumption, near-ballistic operation, reduced short channel effects, high carrier mobility, one dimensional band structure, higher operating frequencies and improved electrostatics at nanoscale due to its non-planar structure [12,13].…”

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confidence: 99%

Performance Analysis of CNFET Based 6T SRAM

Divya

Kaur

Singh

2018

COJEC

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CNFET is an emerging device which facilitates continuing feature size scaling trend. This novel device is predicted to outperform existing planer devices in near future owing to its unique features like ballistic transport operation, excellent carrier mobility, high current carrying capability, high stability, one dimensional band structure. In this paper, the performance of CNFET based six transistor (6T) SRAM cell has been analyzed. The effects of variations in dielectric material, oxide thickness, metal gate and CNT work function, Fermi level and chiral vector on power delay product (PDP) and static noise margin (SNM) are comprehensively analyzed. It is observed that Hafnium Silicate (HfSiO4) as dielectric material at 1nm oxide thickness yields best results in terms of stability and energy efficiency. CNT work function of 4.65eV yields most optimum PDP value of 63.59 zepto Joule. The optimum SNM value of 358mV has been obtained at a CNT work function of 4.28eV along with best PDP/SNM ratio of 5.6mV/zJ. It is also observed that Fermi level at 0.6eV gives the most promising results. The computed results indicate that (22, 0) chirality based 6T SRAM cell yield the best performance from energy efficiency point (PDP) of view along with highest SNM/PDP ratio of 6.30mV/zJ. To get more stable SRAM cell, (13, 0) chirality gives the best SNM result of 381mV.

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