2017
DOI: 10.3390/en10040581
|View full text |Cite
|
Sign up to set email alerts
|

Double-Carrier Phase-Disposition Pulse Width Modulation Method for Modular Multilevel Converters

Abstract: Modular multilevel converters (MMCs) have become one of the most attractive topologies for high-voltage and high-power applications. A double-carrier phase disposition pulse width modulation (DCPDPWM) method for MMCs is proposed in this paper. Only double triangular carriers with displacement angle are needed for DCPDPWM, one carrier for the upper arm and the other for the lower arm. Then, the theoretical analysis of DCPDPWM for MMCs is presented by using a double Fourier integral analysis method, and the Four… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

0
11
0

Year Published

2017
2017
2024
2024

Publication Types

Select...
6
1

Relationship

0
7

Authors

Journals

citations
Cited by 8 publications
(11 citation statements)
references
References 45 publications
(78 reference statements)
0
11
0
Order By: Relevance
“…Hence, every leg has a proportional-integral-resonance (PIR) controller, with their input being the differences between the reference and measured current. The most commonly used pulse generation scheme for the MMC topology is the nearest level modulation (NLM) [24] and the gate control signals are generated for the IGBTs in all sub-modules [25,26].…”
Section: Internal Control Loopmentioning
confidence: 99%
“…Hence, every leg has a proportional-integral-resonance (PIR) controller, with their input being the differences between the reference and measured current. The most commonly used pulse generation scheme for the MMC topology is the nearest level modulation (NLM) [24] and the gate control signals are generated for the IGBTs in all sub-modules [25,26].…”
Section: Internal Control Loopmentioning
confidence: 99%
“…When the MMC system operates under PDPWM modulation, we first calculate the number of SMs that need to be input at each moment. Then, in combining the current direction of the bridge arm, the input SM is selected by means of the capacitor voltage sorting algorithm to ensure capacitor voltage equalization of each SM during system operation [19]. For the convenience of description, we take the SM open-circuit fault in the upper arm of a-phase as an example (N = 4) and discuss the fault tolerance capability of single-phase bridge arms.…”
Section: Fault Tolerance Capability Analysis Of MMC Bridge Arms Undermentioning
confidence: 99%
“…Suppose we adopt the improved neutral point AC side shift control strategy and the neutral point compound shift control strategy proposed in this paper, the corresponding symmetrical output line voltage amplitudes are U fault line,ac and U fault line,acdc , respectively. To maximize the output line voltage, we can compare them according to Equation (19) and determine the modulation ratio of the phase voltage m fault j ultimately. If the modulation ratio of any phase among the three is not greater than 0, the system cannot function continuously (j = a, b, c).…”
Section: Optimal Neutral Point Position Selection and Overall Fault-tmentioning
confidence: 99%
See 1 more Smart Citation
“…However, under a case of resistance-inductance (R-L) loads, high voltage spikes occur at the base of the stepped output voltage due to the lack of a path for reverse load currents, which tend to deteriorate power quality [12]. Basic modulations techniques for cascaded multilevel topologies are rooted on the fundamental frequency switching [9], sinusoidal pulse width modulation (PWM) [13,14], and space vector PWM (SV-PWM) [15]. However, in solar PV systems, DC sources of a multilevel inverter topology are supplied by PV modules, as shown in Figure 1, which brings about a series of problems:…”
Section: Introductionmentioning
confidence: 99%