Don’t-Care-Based Node Minimization for Threshold Logic Networks

Chen, Yung-Chih; Chang, Hao-Ju; Zheng, Li-Cheng

doi:10.1109/dac18072.2020.9218506

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B Threshold Logic Synthesis1

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“…Additionally, to achieve a better optimization quality, the proposed method has been integrated with other optimization methods. The same authors, in [44], have recently improved this work by proposing don't-care-based node minimization.…”

Section: B Threshold Logic Synthesismentioning

confidence: 99%

Logic Synthesis for Emerging Technologies

Neutzling¹,

Ribas²

2021

JICS

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Emerging technologies are being considered to replace the conventional CMOS-based design that seems arriving to its end of life due to the limits of MOS transistor shrinking. However, since those novel devices are not necessarily switch-based ones, the traditional AND/OR logic synthesis process in the digital integrated circuit design flow tends to become inefficient, whereas threshold logic paradigm seems to be more appropriate for them. In this context, different methods for threshold logic synthesis, suitable for emerging technologies, are reviewed in this paper. The majority logic based design is also discussed herein since it represents a subset of threshold logic domain, and many new technologies have presented the 3-input majority Boolean function as the most basic logic gate. Experimental data, presented in previous works, are used to illustrate and compare the performance of the state-ofthe-art logic synthesis methods related to

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Section: B Threshold Logic Synthesismentioning

confidence: 99%