Do superconducting processors really need cryogenic memories?

Ware, F.; Gopalakrishnan, Liji; Linstadt, Eric; McKee, Sally A.; Vogelsang, Thomas; Wright, Kenneth L.; Hampel, Craig; Bronner, G.

doi:10.1145/3132402.3132424

Cited by 32 publications

(13 citation statements)

References 27 publications

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“…To alleviate some of the power and heat considerations that would be introduced by adding a large amount of semiconductor memory to the SCE system, the semiconductor memory could be implemented at an intermediate temperature. Cryogenic-DRAM is a technology that could potentially be used to fill this role in the system (Tannu et al, 2017;Ware et al, 2017;Wang et al, 2018;Kelly et al, 2019).…”

Section: Memory Hierarchymentioning

confidence: 99%

BrainFreeze: Expanding the Capabilities of Neuromorphic Systems Using Mixed-Signal Superconducting Electronics

Tschirhart

Segall

2021

Front. Neurosci.

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Superconducting electronics (SCE) is uniquely suited to implement neuromorphic systems. As a result, SCE has the potential to enable a new generation of neuromorphic architectures that can simultaneously provide scalability, programmability, biological fidelity, on-line learning support, efficiency and speed. Supporting all of these capabilities simultaneously has thus far proven to be difficult using existing semiconductor technologies. However, as the fields of computational neuroscience and artificial intelligence (AI) continue to advance, the need for architectures that can provide combinations of these capabilities will grow. In this paper, we will explain how superconducting electronics could be used to address this need by combining analog and digital SCE circuits to build large scale neuromorphic systems. In particular, we will show through detailed analysis that the available SCE technology is suitable for near term neuromorphic demonstrations. Furthermore, this analysis will establish that neuromorphic architectures built using SCE will have the potential to be significantly faster and more efficient than current approaches, all while supporting capabilities such as biologically suggestive neuron models and on-line learning. In the future, SCE-based neuromorphic systems could serve as experimental platforms supporting investigations that are not feasible with current approaches. Ultimately, these systems and the experiments that they support would enable the advancement of neuroscience and the development of more sophisticated AI.

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Section: Memory Hierarchymentioning

confidence: 99%

BrainFreeze: Expanding the Capabilities of Neuromorphic Systems Using Mixed-Signal Superconducting Electronics

Tschirhart

Segall

2021

Front. Neurosci.

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“…RYOGENIC superconducting (SC) digital processors operating at 4K, employing Josephson junctions for single flux quantum (SFQ) logic, offer the promise of greatly reduced operating power for high-performance cloud compute systems due to the exceptionally low energy per operation of SFQ circuits [1]. This allows a significant reduction in overall This paragraph of the first footnote will contain the date on which you submitted your paper for review.…”

Section: Introductionmentioning

confidence: 99%

Characterization and Modeling of 22 nm FDSOI Cryogenic RF CMOS

Chakraborty

Aabrar

Gomez

et al. 2021

IEEE J. Explor. Solid-State Comput. Devices Circuits

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Analog and RF mixed-signal cryogenic-CMOS circuits with ultra-high gain-bandwidth product can address a range of applications such as interface circuits between Superconducting Single-flux Quantum (SFQ) logic and cryo-DRAM memory, circuits for sensing and controlling qubits faster than their de-coherence time for at-scale quantum processor. In this work, we evaluate RF performance of 18nm gate length (LG) FDSOI NMOS and PMOS from 300K to 5.5K operating temperature. We experimentally demonstrate extrapolated peak unity current-gain cutoff frequency (fT) of 495/337 GHz (1.35x /1.25x gain over 300K) and peak maximum oscillation frequency (fMAX) of 497/372 GHz (1.3x gain) for NMOS/PMOS, respectively, at 5.5 K. A small-signal equivalent model is developed to enable design-space exploration of RF circuits at cryogenic temperature and identify the temperature-dependent and temperatureinvariant components of the extrinsic and the intrinsic FET. Finally, performance benchmarking reveals that 22nm FDSOI cryogenic RF CMOS provides a viable option for achieving superior analog performance with giga-scale transistor integration density.

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“…MOS technology operating at cryogenic temperatures provides some benefits, such as steeper subthreshold slope, increased carrier mobility, and increased saturation velocity, leading to semiconductor-based circuits with faster operation, reduced leakage, and improved energy-efficiency [4,5]. As shown in Figure 1, MOS technologies operating at cryogenic temperatures are interesting for a wide spectrum of applications including high-performance computing [6,7], control systems for quantum processors [8,9], and aerospace applications [5,10,11]. The need for electronic devices capable of operating at cryogenic temperatures has always been a sought-after feature in deep space applications; however, high-performance computing and especially quantum computing are now increasing the demand for processors and memories that can operate at very low temperatures.…”

Section: Introductionmentioning

confidence: 99%

Embedded Memories for Cryogenic Applications

2021

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The ever-growing interest in cryogenic applications has prompted the investigation for energy-efficient and high-density memory technologies that are able to operate efficiently at extremely low temperatures. This work analyzes three appealing embedded memory technologies under cooling—from room temperature (300 K) down to cryogenic levels (77 K). As the temperature goes down to 77 K, six-transistor static random-access memory (6T-SRAM) presents slight improvements for static noise margin (SNM) during hold and read operations, while suffering from lower (−16%) write SNM. Gain-cell embedded DRAM (GC-eDRAM) shows significant benefits under these conditions, with read voltage margins and data retention time improved by about 2× and 900×, respectively. Non-volatile spin-transfer torque magnetic random access memory (STT-MRAM) based on single- or double-barrier magnetic tunnel junctions (MTJs) exhibit higher read voltage sensing margins (36% and 48%, respectively), at the cost of longer write access time (1.45× and 2.1×, respectively). The above characteristics make the considered memory technologies to be attractive candidates not only for high-performance computing, but also enable the possibility to bridge the gap from room-temperature to the realm of cryogenic applications that operate down to liquid helium temperatures and below.

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Do superconducting processors really need cryogenic memories?

Cited by 32 publications

References 27 publications

BrainFreeze: Expanding the Capabilities of Neuromorphic Systems Using Mixed-Signal Superconducting Electronics

BrainFreeze: Expanding the Capabilities of Neuromorphic Systems Using Mixed-Signal Superconducting Electronics

Characterization and Modeling of 22 nm FDSOI Cryogenic RF CMOS

Embedded Memories for Cryogenic Applications

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