2013
DOI: 10.1007/978-3-642-39799-8_60
|View full text |Cite
|
Sign up to set email alerts
|

DiVinE 3.0 – An Explicit-State Model Checker for Multithreaded C & C++ Programs

Abstract: We present a new release of the parallel and distributed LTL model checker DiVinE. The major improvement in this new release is an extension of the class of systems that may be verified with the model checker, while preserving the unique DiVinE feature, namely parallel and distributed-memory processing. Version 3.0 comes with support for direct model checking of (closed) multithreaded C/C++ programs, full untimed-LTL model checking of timed automata, and a general-purpose framework for interfacing with arbitra… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1
1

Citation Types

0
47
0

Year Published

2014
2014
2022
2022

Publication Types

Select...
5
3
2

Relationship

1
9

Authors

Journals

citations
Cited by 78 publications
(47 citation statements)
references
References 9 publications
0
47
0
Order By: Relevance
“…However, as will be shown later in § VI-D, ZEUS is not tied to Seahorn; it can be used with any other verifier that operates upon LLVM bitcode, such as SMACK [72] or DIVINE [52].…”
Section: Methodsmentioning
confidence: 99%
“…However, as will be shown later in § VI-D, ZEUS is not tied to Seahorn; it can be used with any other verifier that operates upon LLVM bitcode, such as SMACK [72] or DIVINE [52].…”
Section: Methodsmentioning
confidence: 99%
“…Both explicit-set and SAT-based approaches to verification of Simulink diagrams were implemented 1 in the DiVinE [4] verification environment, which already supported these diagrams as input, in the form of CESMI intermediate language. The implementation of set is a relatively straightforward extension of expl: instead of keeping the evaluations in separate states there are fewer multi-states for every explicit control state.…”
Section: A Implementationmentioning
confidence: 99%
“…The problem of analyzing such a model against a temporal logic formula, known as formal analysis or model checking, has received a lot of attention during the past thirty years, and efficient algorithms and software tools are available [2], [3]. On the other hand, the formal synthesis problem, in which the goal is to design or control a system from a temporal logic specification, has not been studied extensively until recently.…”
Section: Introductionmentioning
confidence: 99%