Distribution of interface traps in Au/2% GC‐doped Ca₃Co₄Ga_0.001O_x/n‐Si structures

Abstract

This study presents voltage‐dependent profile of interface traps in Au/n‐Si structure with 2% graphene–cobalt‐doped Ca3Co4Ga0.001Ox interfacial layer. Admittance measurements revealed capacitance‐voltage (C‐V) plots with typical regions of a metal–insulator–semiconductor structure through inversion, depletion, and accumulation regions. Frequency dispersion is observed in C‐V plots and such behavior was explained with excess capacitance, which is associated with the density of interface traps (Dit) in the structure because larger Dit is observed when the measurements are held at low frequencies due to the fact that traps can follow the signal depending on their lifetime. Dit was also obtained using conductance method, which also provided lifetime of the traps. The difference between the values of Dit was attributed to the difference in extraction methods. Obtained results showed that Au/2% graphene–cobalt‐doped Ca3Co4Ga0.001Ox/n‐Si structure yields promising electrical characteristics when the structure is operated at high frequencies. © 2019 Wiley Periodicals, Inc. J. Appl. Polym. Sci. 2020, 137, 48399.