Distributed Simulation of Asynchronous Hardware: The Program Driven Synchronization Protocol

Theodoropoulos, Georgios

doi:10.1006/jpdc.2001.1806

Cited by 4 publications

(5 citation statements)

References 24 publications

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“…The accuracy of timing has been tested by obtaining and comparing simulated time-based values that are used for the performance evaluation of AMULET1 (and asynchronous architectures in general), namely the Dhrystone number, as well as the occupancy and stall periods of the pipelines. These results have been reported in [44,46].…”

Section: Validationsupporting

confidence: 89%

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Simulating asynchronous hardware on multiprocessor platforms: the case of AMULET1

Theodoropoulos

2001

Concurrency and Computation

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SUMMARYSynchronous VLSI design is approaching a critical point, with clock distribution becoming an increasingly costly and complicated issue and power consumption rapidly emerging as a major concern. Hence, recently, there has been a resurgence of interest in asynchronous digital design techniques which promise to liberate digital design from the inherent problems of synchronous systems. This activity has revealed a need for modelling and simulation techniques suitable for the asynchronous design style. The concurrent process algebra communicating sequential processes (CSP) and its executable counterpart, occam, are increasingly advocated as particularly suitable for this purpose. This paper focuses on issues related to the execution of CSP/occam models of asynchronous hardware on multiprocessor machines, including I/O, monitoring and debugging, partition, mapping and load balancing. These issues are addressed in the context of occarm, an occam simulation model of the AMULET1 asynchronous microprocessor; however, the solutions devised are more general and may be applied to other systems too.

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Section: Validationsupporting

confidence: 89%

“…The occam ALT construct provides for the non-deterministic choice of messages from different channels, and therefore may effectively model the behaviour of an arbiter; however, it introduces synchronization problems. A detailed discussion of these problems is outside the scope of this paper and may be found in [44,46] …”

Section: Modelling Micropipelinesmentioning

confidence: 99%

Simulating asynchronous hardware on multiprocessor platforms: the case of AMULET1

Theodoropoulos

2001

Concurrency and Computation

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“…The occam ALT construct provides for the nondeterministic choice of messages from different channels and therefore may effectively model the behavior of an arbiter, but it introduces synchronization problems. A detailed discussion of these problems is outside the scope of this article and may be found in Theodoropoulos [41,43].…”

Section: The Modeling Frameworkmentioning

confidence: 99%

“…Another important issue is simulation timing and synchronization. Detailed descriptions of the techniques that have been devised to address these issues in the context of occarm, as well as performance results, may be found in Theodoropoulos [41][42][43][44].…”

Section: Simulation Issuesmentioning

confidence: 99%

“…AMULET1, being one of the very few asynchronous implementations of a complete, complex commercial microprocessor, presented a unique opportunity to assess the suitability of CSP and a great modeling challenge. This article focuses on the modeling aspects of the work and does not discuss simulation issues-the latter have been discussed in detail in Theodoropoulos [41][42][43][44]. Emphasis is given to the problems encountered when attempting to model the different parts of the processor.…”

Section: Introductionmentioning

confidence: 99%

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Modeling an Asynchronous Microprocessor

Theodoropoulos

2003

SIMULATION

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Synchronous very large-scale integration (VLSI) design is approaching a critical point, with clock distribution becoming an increasingly costly and complicated issue and power consumption rapidly emerging as a major concern. Recently, there has been a resurgence of interest in asynchronous design techniques due to the significant potential benefits that the elimination of global synchronization may offer to issues such as clock distribution, power consumption, performance, and modularity. Modeling and simulation may perform a catalytic role in the quest for the realization of the potential offered by asynchronous logic. Hence, the recurrence of interest in asynchronous design has been accompanied by intense research activity aimed at developing notations and techniques appropriate for modeling and simulating asynchronous systems. Communication sequential processes and its executable counterpart, occam, are increasingly advocated as particularly suitable for this purpose. This article discusses the modeling of an asynchronous microprocessor using occam.

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Design of Synchronous and Asynchronous Architectures for DFT based Adaptive Equalizer

Santha¹,

Vaidehi²

2004

IEEE SoutheastCon, 2004. Proceedings.

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Distributed Simulation of Asynchronous Hardware: The Program Driven Synchronization Protocol

Cited by 4 publications

References 24 publications

Simulating asynchronous hardware on multiprocessor platforms: the case of AMULET1

Simulating asynchronous hardware on multiprocessor platforms: the case of AMULET1

Modeling an Asynchronous Microprocessor

Design of Synchronous and Asynchronous Architectures for DFT based Adaptive Equalizer

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