Distributed SDN architecture for NoC-based many-core SoCs

Ruaro, Marcelo; Velloso, Nedison; Jantsch, Axel; Moraes, Fernando

doi:10.1145/3313231.3352361

Cited by 11 publications

(20 citation statements)

References 19 publications

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“…Its main advantage is to unify the management of different device vendors, removing the control from the network device, and bring it to a software Controller. Recent works investigate SDN for MCSoCs using a centralized approach [8,9,20], while others propose distributed SDN management [7,21], including cluster-based organizations [7].…”

Section: B Sdn For Mcsocmentioning

confidence: 99%

“…A cluster has a set of SPs, managed by one M PE. Figure 1 , which may be a task running in a given PE (centralized SDN [8,9,20]) or several tasks distributed in the system (distributed SDN [7,21]). The Controller is a task with OS privileges.…”

Section: B System Managementmentioning

confidence: 99%

“…The M PE then configure the communicating task pair to use the new path. Further details about the Controller implementation are available at [7,25], including a distributed Controller implementation.…”

Section: B System Managementmentioning

confidence: 99%

“…Recent research showed the Software-Defined Networking (SDN) benefits for MCSoCs, targeting energy reduction and QoS [7]- [9]. The SDN paradigm reduces the Networkon-Chip (NoC) physical complexity by moving the router control logic from the hardware to the software level.…”

Section: Introductionmentioning

confidence: 99%

“…The Controller keeps the NoC resources status and, based on its rules, defines paths at runtime for communicating tasks. The main benefit of SDN is its global knowledge of the NoC, which allows multi-objective communication path search and the possibility to the designer to update the search rules without the need to design a new NoC [7,8].…”

Section: Introductionmentioning

confidence: 99%

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SDN-Based Secure Application Admission and Execution for Many-Cores

2020

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General-purpose many-core system-on-chip (MCSoC) requires support to the execution of dynamic workloads, i.e., admission of new applications at runtime. Some applications may require QoS and security from the MCSoC, not tolerating that malicious tasks or hardware Trojans steal or corrupts their data. A robust method to provide security is to isolate the communication and computation. Most current works employ such isolation in continuous regions named secure zones (SZ). Motivated by the recent study of the Software-Defined Networking (SDN) paradigm for MCSoCs, this work proposes to use SDN-based management to implement the communication isolation at runtime. The computation isolation occurs by mapping only tasks of the same application at each core. The communication isolation is supported by the SDN paradigm, which establishes dedicating paths for secure applications. Results show that the SDN-based approach presents a negligible latency to admit and execute a secure application, with a reduced hardware cost and higher computational resources utilization compared to SZs.

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Section: B Sdn For Mcsocmentioning

confidence: 99%

Section: B System Managementmentioning

confidence: 99%

Section: B System Managementmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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SDN-Based Secure Application Admission and Execution for Many-Cores

2020

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A Systemic and Secure SDN Framework for NoC-Based Many-Cores

2020

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Recent exploration of Software-Defined Networking (SDN) for Many-Core Systems-on-Chip (MCSoCs) showed higher management flexibility and reduced physical complexity compared to other runtime communication management. In SDN, there is a software SDN Controller (control layer) that configures generic routers (data layer). The adoption of SDN makes the path establishment programmable and straightforward, according to different network policies, such as low power, QoS, fault-tolerance. It is also possible to change the path establishment policies at runtime without the need to redesign the NoC. Current works focus on proposing SDN architectures, lacking a systemic framework that describes the steps required to implement SDN into a Many-core environment. Security is an observed gap in SDN designs. A malicious task could configure SDN routers and take control of the NoC. The contribution of this work is to present a systemic and secure SDN framework (SDN-SS), detailing the steps required to support SDN in MCSoCs. This work also describes the iteration between the hardware, operating system, and user's tasks. The SDN-SS manages a Multiple-Physical NoC, with one packet-switching subnet and a set of circuitswitching subnets. The originality of SDN-SS includes (i) a step-by-step framework description addressing the phases required to support a secure SDN management; (ii) a secure SDN router configuration protocol; (iii) a protocol to change the subnet at runtime. Experimental results show the framework's capability to avoid DoS and Spoofing attacks while presents a low SDN router configuration overhead, corresponding up to 2% of a related work delay and a small impact over the user's task communication.

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Hardware-Accelerated Platforms and Infrastructures for Network Functions: A Survey of Enabling Technologies and Research Studies

2020

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In order to facilitate flexible network service virtualization and migration, network functions (NFs) are increasingly executed by software modules as so-called "softwarized NFs" on General-Purpose Computing (GPC) platforms and infrastructures. GPC platforms are not specifically designed to efficiently execute NFs with their typically intense Input/Output (I/O) demands. Recently, numerous hardwarebased accelerations have been developed to augment GPC platforms and infrastructures, e.g., the central processing unit (CPU) and memory, to efficiently execute NFs. This article comprehensively surveys hardware-accelerated platforms and infrastructures for executing softwarized NFs. This survey covers both commercial products, which we consider to be enabling technologies, as well as relevant research studies. We have organized the survey into the main categories of enabling technologies and research studies on hardware accelerations for the CPU, the memory, and the interconnects (e.g., between CPU and memory), as well as custom and dedicated hardware accelerators (that are embedded on the platforms); furthermore, we survey hardware-accelerated infrastructures that connect GPC platforms to networks (e.g., smart network interface cards). We find that the CPU hardware accelerations have mainly focused on extended instruction sets and CPU clock adjustments, as well as cache coherency. Hardware accelerated interconnects have been developed for on-chip and chip-to-chip connections. Our comprehensive up-to-date survey identifies the main trade-offs and limitations of the existing hardware-accelerated platforms and infrastructures for NFs and outlines directions for future research.

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Distributed SDN architecture for NoC-based many-core SoCs

Cited by 11 publications

References 19 publications

SDN-Based Secure Application Admission and Execution for Many-Cores

SDN-Based Secure Application Admission and Execution for Many-Cores

A Systemic and Secure SDN Framework for NoC-Based Many-Cores

Hardware-Accelerated Platforms and Infrastructures for Network Functions: A Survey of Enabling Technologies and Research Studies

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