Digital still camera system for megapixel CCD

Nakano, N.; Nishimura, R.; Sai, H.; Nishizawa, A.; Komatsu, Hidehiko

doi:10.1109/30.713166

Cited by 21 publications

(3 citation statements)

References 1 publication

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Therefore, location selection is very important. Referring to [4,7,8],we define a hexahedral area which satisfies Eq.12 in Y, Cb, Cr domain. All pixels which locate in this area will be accounted as valid pixels.…”

Section: Applied Mechanics and Materials Vols 130-134mentioning

confidence: 99%

Research and Design of Color Restoration Algorithm for Demosaicing Bayer Pattern Images

Zhu

Wen

Gao

et al. 2011

AMM

View full text Add to dashboard Cite

This paper analyses the process of obtaining real color image based on a single CCD/CMOS sensor. Bayer CFA Interpolation algorithm and White Balance algorithm are presented. The proposed interpolation algorithm which can obtain better color image and is easier to implement by hardware is provided. In order to cancel chromatic aberration, one White Balance algorithm which aims at sequential image is presented and process of FPGA design is given. Experimental results show that the design works normally. The color of corrected picture is vivid compared to the real world.

show abstract

Section: Applied Mechanics and Materials Vols 130-134mentioning

confidence: 99%

Research and Design of Color Restoration Algorithm for Demosaicing Bayer Pattern Images

Zhu

Wen

Gao

et al. 2011

AMM

View full text Add to dashboard Cite

show abstract

“…Dramatic advances in the field of computational and medical imaging over the past decades have enabled many critical applications such as night vision, medical diagnosis, quality control, and remote sensing applications [1][2][3][4][5]. The increasing demand in image quality and its fidelity needs an increase in pixel count and a sophisticated post-processing mechanism to efficiently store, transmit, and analyze this huge data [6][7][8][9]. There is an inherent trade-off between the generation of big data by such imaging systems, and efficiency in extraction of useful information within real-time constraints, limiting the efficacy of such sensors in real-time decision-making systems [10,11].…”

Section: Introductionmentioning

confidence: 99%

CMOS approach to compressed-domain image acquisition

Ghasemi¹,

Bhattarai²,

Fiorante³

et al. 2017

Opt. Express

View full text Add to dashboard Cite

A hardware implementation of a real-time compressed-domain image acquisition system is demonstrated. The system performs front-end computational imaging, whereby the inner product between an image and an arbitrarily-specified mask is implemented in silicon. The acquisition system is based on an intelligent readout integrated circuit (iROIC) that is capable of providing independent bias voltages to individual detectors, which enables implementation of spatial multiplication with any prescribed mask through a bias-controlled response-modulation mechanism. The modulated pixels are summed up in the image grabber to generate the compressed samples, namely aperture-coded coefficients, of an image. A rigorous bias-selection algorithm is presented to the readout circuit, which exploits the bias-dependent nature of the imager's responsivity. Proven functionality of the hardware in transform coding compressed image acquisition, silicon-level compressive sampling, in pixel nonuniformity correction and hardware-level implementation of region-based enhancement is demonstrated.

show abstract

“…They are also difficult to be reconfigured because the hardware is only optimized for a particular task. Several ASIC solutions for image pipeline are presented, such as [4]- [6]. However, it is a dilemma to achieve high processing efficiency at low cost while maintaining flexibility and capability with the above-mentioned two conventional solutions.…”

Section: Introductionmentioning

confidence: 99%

CRISP: Coarse-Grained Reconfigurable Image Stream Processor for Digital Still Cameras and Camcorders

Chen

Chien

2008

IEEE Trans. Circuits Syst. Video Technol.

View full text Add to dashboard Cite

To design the hardware for image signal processing pipelines in digital still cameras (DSCs) and video camcoders, it is a dilemma for conventional solutions, such as application-specific integrated circuits (ASICs) and digital signal processors (DSPs), to achieve high processing capability at low cost while maintaining high flexibility for various algorithms. With the observation of the characteristics of image signal-processing pipelines, including the different requirements for different operation modes and the algorithmic similarity of image-processing tasks, a new coarse-grained reconfigurable image stream processor (CRISP) is proposed in this paper. The design idea is to devote low-cost hardware for the requirements in the preview mode and add some hardware resources for higher flexibility and processing capability in the picture-taking mode. With the coarse-grained reconfigurable stage processing elements designed for image signal-processing tasks and the reconfigurable interconnection unit with unified communication protocol, CRISP can be reconfigured as an efficient dedicated hardware in the preview mode, and it can act like a flexible DSP for the picturetaking mode with different contexts. Implementation result shows that the core (die) size is 5 mm 2 (7.72 mm 2 ) with TSMC 0.18-m process, and the power consumption is 218 mW at 1.8 V. At the working frequency of 115 MHz, the processor is capable of processing 11 M-pixel still images at 10 fps for DSCs or 1920 1080 video frames at 55 fps for camcorders. CRISP can execute image pipelines 83 times faster than the state-of-the-art DSP with only about one-tenth die size.

show abstract

Digital still camera system for megapixel CCD

Cited by 21 publications

References 1 publication

Research and Design of Color Restoration Algorithm for Demosaicing Bayer Pattern Images

Research and Design of Color Restoration Algorithm for Demosaicing Bayer Pattern Images

CMOS approach to compressed-domain image acquisition

CRISP: Coarse-Grained Reconfigurable Image Stream Processor for Digital Still Cameras and Camcorders

Contact Info

Product

Resources

About