Digital optics

Streibl, N.; Brenner, Karl‐Heinz; Huang, Alan; Jahns, Jürgen; Jewell, J. L.; Lohmann, Adolf W.; Miller, D. A. B.; Murdocca, Miles J.; Prise, M. E.; Sizer, T.

doi:10.1109/5.48834

Cited by 75 publications

(21 citation statements)

References 62 publications

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“…Such systems have received substantial research attention and laboratory demonstrations [99]- [106]. In this case, imaging optics is used to relay entire arrays of beams from one chip to another.…”

Section: B)mentioning

confidence: 99%

“…For example, a 6 stage system with over 60,000 light beams was demonstrated using such free-space optics [106]. Some earlier work focused on optical interconnected optoelectronic logic device arrays [99]- [101], and later work has investigated CMOS chips with large arrays of optoelectronic devices hybrid attached to the chips [107], [108]. Much of this work used quantum well diode structures exploiting the strong quantum-confined Stark effect electroabsorption [109] to make the optoelectronic logic or modulator devices.…”

Section: B)mentioning

confidence: 99%

See 1 more Smart Citation

Device Requirements for Optical Interconnects to Silicon Chips

2009

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Abstract-We examine the current performance and future demands of interconnects to and on silicon chips. We compare electrical and optical interconnects and project the requirements for optoelectronic and optical devices if optics is to solve the major problems of interconnects to future high performance silicon chips. Optics has potential benefits in interconnect density, energy and timing. The necessity of low interconnect energy imposes low limits especially on the energy of the optical output devices, with a ~ 10 fJ/bit device energy target emerging. Some optical modulators and radical laser approaches may meet this requirement. Low (e.g., a few fF or less) photodetector capacitance is important. Very compact wavelength splitters are essential for connecting the information to fibers. Dense waveguides are necessary on-chip or on boards for guided wave optical approaches, especially if very high clock rates or dense WDM are to be avoided. Free space optics potentially can handle the necessary bandwidths even without fast clocks or WDM. With such technology, however, optics may enable the continued scaling of interconnect capacity required by future chips.

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Section: B)mentioning

confidence: 99%

Section: B)mentioning

confidence: 99%

Device Requirements for Optical Interconnects to Silicon Chips

2009

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“…While several implementations of integrated silicon photonics are currently under study [8,11,34,41,46], we focus on micro-ring resonator based technology, which uses "rings" to modulate and demodulate light. We refer the reader to prior work [23,34,44] for more details, and subsequently we only discuss issues directly impacting our study.…”

Section: Photonic Interconnect Basicsmentioning

confidence: 99%

Combining memory and a controller with photonics through 3D-stacking to enable scalable and energy-efficient systems

Udipi

Muralimanohar

Balasubramonian

et al. 2011

SIGARCH Comput. Archit. News

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It is well-known that memory latency, energy, capacity, bandwidth, and scalability will be critical bottlenecks in future large-scale systems. This paper addresses these problems, focusing on the interface between the compute cores and memory, comprising the physical interconnect and the memory access protocol. For the physical interconnect, we study the prudent use of emerging silicon-photonic technology to reduce energy consumption and improve capacity scaling. We conclude that photonics are effective primarily to improve socket-edge bandwidth by breaking the pin barrier, and for use on heavily utilized links. For the access protocol, we propose a novel packet based interface that relinquishes most of the tight control that the memory controller holds in current systems and allows the memory modules to be more autonomous, improving flexibility and interoperability. The key enabler here is the introduction of a 3D-stacked interface die that allows both these optimizations without modifying commodity memory dies. The interface die handles all conversion between optics and electronics, as well as all low-level memory device control functionality. Communication beyond the interface die is fully electrical, with TSVs between dies and low-swing wires on-die. We show that such an approach results in substantially lowered energy consumption, reduced latency, better scalability to large capacities, and better support for heterogeneity and interoperability.

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“…The emergence of electrically controlled optical modulators based on novel effects in quantum-well structures [36], including the family of devices known as self-electrooptic-effect devices (SEED's) [37], [38] and the development of vertical-cavity surface-emitting lasers (VCSEL's) (see, e.g., [39] and [40] for recent representative examples), were particularly important because they offered viable optoelectronic output devices for fabrication in large numbers in arrays. The optoelectronic device arrays and smart pixels stimulated significant work on array optical systems (see, e.g., [41]), leading to some large system demonstrations based on the SEED technology with, e.g., tens of thousands of light beams in a functioning digital system [42].…”

Section: A Historical Backgroundmentioning

confidence: 99%