or a real positive pole becomes dominant at with heavy load resistances R,. Having the possibility of controlling the gain of the current mirror M , the output impedance of the voltage buffer can he tuned. This can be achieved either by using a tunable current amplifier 131, or in a small range using the regulated cascode current mirror [4] with different regulation currents.Criterion of stuhility: Because the output impedance of the CVB is defined by the subtraction of y, s of transistors (eqn. 2) it can become negative, and that can introduce instability in many applications. To avoid an unstable circuit the gain of the current mirror should fulfil the condition In this case the pole pair from eqn (6) of the voltage transfer function cannot move into the right half-plane Simulation results. The performance of the circuit with a capacitive load of C , = IOpF connected to the output was simulated on PSPICE using simplified Level 2 transistor model parameters for a commercially available CMOS process. In Fig. 3 the AC characteristic of the output impedance of the CVB is compared with the output impedance of the OVB having the same transistor sizes. At low frequencies it shows a significant improvement of the output impedance value. At 993 kHz the zero described in eqn. 3 is placed, and at 67.6 MHz the peak given by eqn. 4 can he found. After the peak the output impedance of the CVB follows the output impedance of the OVB Further. the AC transfer characteristics are shown in I;ig 4. Having a light load at the output the transfer function exhibits a complex conjugate pole pair peak at 66MHz (eqn. 6), which results in a damped oscillation of the output voltage in response to a step function. The connection of a heavy load at the output leads to the dominance of the first-order pole at 3.72 MHz (eqn. 7).Conclusions: In this paper a low output impedance CMOS voltage buffer exploiting the compensation technique (CVB) has been introduced. This technique makes it possible to build voltage buffers with low output impedances using small transistor sizes and low bias currents, and an electronic tuning of the output impedance, by choosing a current mirror gain, as well. Further, the compensation technique makes it possible to achieve negative impedances, which can be useful in the design of both grounded and floating negative resistors.