Digital filter implementation based on the RNS with diminished-1 encoded channel

Abstract

A technique, based on the residue number system (RNS) with diminished-1 encoded channel, has being used for implementing a finite impulse response (FIR) digital filter. The proposed RNS architecture of the filter consists of three main blocks: forward and reverse converter and arithmetic processor for each channel. Architecture for residue to binary (reverse) convertor with diminished-1 encoded channel has been proposed. Besides, for all RNS channels, the systolic design is used for the efficient realization of FIR filter. A numerical example illustrates the principles of diminished-1 residue arithmetic, signal processing, and decoding for FIR filters.

High-Performance Digital Filtering on Truncated Multiply-Accumulate Units in the Residue Number System

“…Practical implementation of a computational modulo 2 + 1 channel, ∈ , requires the insertion of additional logic according to the diminished-1 method to track the zero, which is an undesirable phenomenon when developing a system with minimal latency and hardware costs [24,25]. Thus, it is advisable to use only moduli of the form 2 − 1, ∈ , as odd moduli of the system.…”

FIR Filters in Two-Stage Residue Number System

“…FIR filters play an important role in DSP because they are much less sensitive to quantization errors in contrast to recursive filters [11]. Any FIR filter can be described by the formula…”

Improving Generalized Discrete Fourier Transform (GDFT) Filter Banks with Low-Complexity and Reconfigurable Hybrid Algorithm

“…The operating speed of a one-hot code modular adder was superior to the conventional binary code. A non-recursive digital filter was presented based on moduli set 2 n−1 , 2 n , 2 n+1 , using diminished 1 representation [45]. The method investigated the usage of a n + 1-bit circuit for a 2 n + 1-bit channel.…”