Digital Active Gate Drives using sequential optimization

Abstract

This paper presents a digital Active Gate Drive (AGD) methodology for power semiconductor devices. The inherent latency limitation of digital signal processing systems is addressed by a sequential optimization procedure that uses voltage and current signals recorded at the previous switching edge to develop an optimized gate drive waveform for the next switching edge. Experimental results using a half-bridge circuit operating at 180 V/100 A show that the proposed scheme is capable of minimizing switching losses whilst constraining the overvoltage peaks occurring at turn-on and turn-off to as low as 200 V and 300 V respectively.

A four‐step control for IGBT switching improvement using an active voltage gate driver

“…where Q r is a constant under the same load condition. By substituting ( 16) into ( 14), the influence of the characteristics in Phase IIb on the voltage overshoot V os is obtained in (17).…”

“…Since the hardware of the control circuit is specifically designed with fixed components, it is hard to adapt to changing operating conditions with the aging of the devices. Consequently, interactive learning [15] and digital adaptive control methods [16][17][18] are applied to overcome this defect. But real-time control still requires high-performance and high-speed analog-to-digital or digital-to-analog converters, which are not cost-effective.…”

Experimental Investigations on the Tuning of Active Gate Drivers under Load Current Variations

“…II, ON 2 controls the amount of gate charge sunk when T ls is in Miller region, meaning that the longer ON 2 lasts, the more v DS increases. With these considerations, both t on,1 and t on,2 were modified as 5] ns and [-0.5,3.5] ns ranges, respectively. Figure 8 As it can be noticed, the lightest region, i.e., the one with minimum undershoot, has moved to higher t on,1 and t on,2 , thus assessing the theoretical motivations reported.…”

“…Active Gate Drivers (AGDs) are currently being investigated to address the aforementioned issues, as they allow to shape the switching waveforms by modulating the driver strength during transients [4]. Indeed, the modulation can be achieved by modifying the current/voltage/resistance value, and the profile can be fixed, modified during the transient or adapted cycle-by-cycle to account for operating condition variations [5]. With respect to traditional solutions, e.g., snubbers and ferrite beads, AGDs allow a better trade-off between switching power losses and overshoot reduction as the power transistor is slowed down only for a part of the overall transient [6].…”

“…Indeed, this issue deserves further investigations as it is crucial for the practical use of open-loop AGDs. The aim of this paper is to provide an experimental relation between the AGD parameters and the actual load current, in such a way, the nominal profile can be adapted to different loads without the need of a large memory to store the driving patterns or of devoting several steps to find the optimal profile, as discussed in [5]. The remainder of the paper is organized as follows.…”