Dielectric and work function engineered TFET for ambipolar suppression and RF performance enhancement

Abstract

A novel approach to suppress the ambipolar behaviour and enhance RF parameters is proposed for the first time. For this, the dielectric and gate material work function engineering is used to suppress the ambipolar behaviour individually. Further, the combination of gate dielectric and gate material work function engineering is used to suppress the ambipolar conduction in huge amount and to eliminate the hot carriers effects. Apart from these, the proposed work improves the ON-state current and RF figures of merit for symmetric devices.

A Doping-Less Tunnel Field-Effect Transistor with Si0.6Ge0.4 Heterojunction for the Improvement of the On–Off Current Ratio and Analog/RF Performance

“…Electronics 2019, 8, x FOR PEER REVIEW 2 of 10 [15,16]. TFETs have a lower SS value and off-state current, so they can obtain a larger voltage gain and noise margin in inverter circuit applications [17]. However, the switching ratio and frequency characteristics are far from ideal in TFETs, and the fabrication processes are complicated, which can limit their application in digital circuits.…”

“…Device performance can also be improved by using narrow bandgap semiconductor materials, high-k gate dielectric materials such as III-V-based and Si 1-x Ge x -based devices [13,14], and tunneling field-effect transistors (TFETs) [15,16]. TFETs have a lower SS value and off-state current, so they can obtain a larger voltage gain and noise margin in inverter circuit applications [17]. However, the switching ratio and frequency characteristics are far from ideal in TFETs, and the fabrication processes are complicated, which can limit their application in digital circuits.…”

Representation of heterostructure electrically doped nanoscale tunnel FET with Gaussian-doping profile for high-performance low-power applications

“…Therefore, it has created a high current drive at the negative voltage similar to the positive voltage. To overcome the ambipolar behavior, researchers have used hetero-gate dielectrics, gate workfunction engineering, asymmetric doping for source and drain [18], Gaussian-doping profiles, and gate-drain overlapping [14,16,17,[19][20][21][22].…”

“…Another drawback in the down-scaling process of TFETs is to fabricate metallurgical junctions due to the need for the creation of abrupt junctions at high temperatures which is difficult and expensive [7]. This problem can be solved using junctionless TFETs (JLTFETs) [22,23]. JLTFET uses highdoping concentrations in the drain, channel, and source.…”

“…JLTFETs also include inferior I on and ambipolar behavior. To overcome these problems, different methods have been investigated, such as: using heterostructures at source/channel interfaces [37][38][39][40][41], the assumption of gate workfunction engineering [42][43][44][45], the adoption of hetero-gate dielectrics [46][47][48][49], using Gaussian-doping profiles [22,50,51], applying source pockets [52], the consideration of strain engineering [53,54], using ferroelectric insulators [40], and drain workfunction engineering for DLTFET [55,56].…”