DFSynthesizer: Dataflow-based Synthesis of Spiking Neural Networks to Neuromorphic Hardware

Abstract

Spiking Neural Networks (SNN) are an emerging computation model, which uses event-driven activation and bio-inspired learning algorithms. SNN-based machine-learning programs are typically executed on tilebased neuromorphic hardware platforms, where each tile consists of a computation unit called crossbar, which maps neurons and synapses of the program. However, synthesizing such programs on an off-the-shelf neuromorphic hardware is challenging. This is because of the inherent resource and latency limitations of the hardware, which impact both model performance, e.g., accuracy, and hardware performance, e.g., throughput. We propose DFSynthesizer, an end-to-end framework for synthesizing SNN-based machine learning programs to neuromorphic hardware. The proposed framework works in four steps. First, it analyzes a machine-learning program and generates SNN workload using representative data. Second, it partitions the SNN workload and generates clusters that fit on crossbars of the target neuromorphic hardware. Third, it exploits the rich semantics of Synchronous Dataflow Graph (SDFG) to represent a clustered SNN program, allowing for performance analysis in terms of key hardware constraints such as number of crossbars, dimension of each crossbar, buffer space on tiles, and tile communication bandwidth. Finally, it uses a novel scheduling algorithm to execute clusters on crossbars of the hardware, guaranteeing hardware performance. We evaluate DFSynthesizer with 10 commonly used machine-learning programs. Our results demonstrate that DFSynthesizer provides much tighter performance guarantee compared to current mapping approaches. CCS Concepts: • Hardware → Neural systems; Emerging languages and compilers; Emerging tools and methodologies; • Computer systems organization → Data flow architectures; Neural networks.

LCIP: a retargetable framework for optimized CNN inference

“…11 SDF is widely-used in model-based signal processing system design due to its support for compile-time design optimization and verification. 13 Venieris et al 14 Unknown Venieris et al 15 (Only for FPGAs) (Only for FPGAs) Song et al 16 Xie et al 11…”

“…Song et al proposed a dataflow-based synthesis tool called DFSynthesizer, which is designed for deploying Spiking Neural Networks (SNNs) on low power neuromorphic hardware platforms. 16 Table 1 provides a comparison of LCIP along with several previously-developed neural network inference systems. The comparison is presented in terms of four dimensions -Dataflow Semantics, Retargetability, Resourceability, and Configurability.…”