Device performance limit of monolayer SnSe2 MOSFET

Li, Hong; Liang, Jiakun; Wang, Qida; Liu, Fengbin; Zhou, Gang; Qing, Tao; Zhang, Shaohua; Lü, Jing

doi:10.1007/s12274-021-3785-1

Cited by 14 publications

(29 citation statements)

References 47 publications

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“…After introducing the underlap structures, the I off of 5 and 3 nm gate-length FETs meets the ITRS for HP applications at a lower gate voltage, especially with “2–2” underlap structure. This is because an underlap structure can effectively increase the channel length and weaken the transmission possibility, and thus, it can suppress the leakage current and achieve off state rapidly. ,, Seen from Figure S8a, the I on of the 5 nm gate-length FETs can reach 1012 μA/μm (1020 μA/μm) with the help of “2–2” (“1–1”) underlap structure, and the I on of the 3 nm gate-length FETs with “2–2” underlap can satisfy 76.7% of ITRS for HP standards (900 μA/μm). However, the I on of the 3 nm gate-length FETs with “3–3” underlap is only 128 μA/μm, smaller than that of the device with “2–2” underlap (see Figure S9).…”

Section: Results and Discussionmentioning

confidence: 99%

Prediction of Semiconducting 2D Nanofilms of Janus WSi₂P₂As₂ for Applications in Sub-5 nm Field-Effect Transistors

Dong

Niu

et al. 2023

ACS Appl. Nano Mater.

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Searching for eligible two-dimensional (2D) semiconductors to fabricate high-performance (HP) short-channel field-effect transistors (FETs) at the nanoscale is essential toward the continuous miniaturization of devices. Herein, we predict the 2D Janus WSi2P2As2 semiconductor and propose it as a qualified channel material for sub-5 nm FETs by using first-principles calculations. The results demonstrate that the monolayer Janus WSi2P2As2 is a 2D semiconducting nanofilm with a band gap of 0.83 eV, a hole mobility of 490 cm2 V–1 s–1 in the armchair direction, and an out-of-plane polarization. Benefiting from these outstanding intrinsic characteristics, the performance of the 5 and 3 nm gate-length WSi2P2As2 FETs can fulfill the International Technology Roadmap for Semiconductors for HP standards after employing optimizing strategies, including underlap structure, dielectric project, and cold source. Our results promote the development of new 2D nanomaterials and device architectures for designing HP short-channel FETs.

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Section: Results and Discussionmentioning

confidence: 99%

Prediction of Semiconducting 2D Nanofilms of Janus WSi₂P₂As₂ for Applications in Sub-5 nm Field-Effect Transistors

Dong

Niu

et al. 2023

ACS Appl. Nano Mater.

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“…Several sub-5 nm p-type 2D ML DG-MOSFETs also show higher I ON current among the 2D materials which are summarized in Table S4 and S5, Supporting Information. The on-state currents of these p-type 2D ML MOSFETs are GeSe (1703, 1684 μA μm À1 ), [154] p-type black phosphorene (Black p) AM direction (4500, 3651 μA μm À1 ), [102] p-type tellurene ZZ direction (2114 μA μm À1 ), [157] p-type AsP AM direction (1757 μA μm À1 ), [103] p-type α-CS AM direction (3700 μA μm À1 ), [153] and p-type α-CS [97,108,109,130,137,152,153,155,156,[158][159][160]164] and p-type [97,102,108,109,130,137,153,154,156,157,159,160] ML 2D FETs as a function of gate length (L g ) for HP applications. The red and black color dashed lines indicate the ITRS requirements for HP 2026 and HP 2028, respectively.…”

Section: Exp Results A)mentioning

confidence: 99%

“…Similarly AM and ZZ refer to the quantum transport behavior in the armchair and zigzag directions, respectively, whereas WL and UL describe device structures without underlap and with, underlap respectively). [97,108,109,130,137,153,155,159,160,164] and p-type [97,108,109,130,137,153,[157][158][159][160]164] ML 2D FETs as a function of L g for LP applications. The red and black dashed lines indicate the ITRS requirements for LP 2026 and LP 2028, respectively.…”

Section: Exp Results A)mentioning

confidence: 99%

“…Other parameters such as EOT, supply voltage, channel length, and carrier concentration were taken into consideration for ITRS semiconductor 2013 requirements for both HP and LP applications in the 2028 horizon and are mentioned in Table 2. [103,108,144,157] SS values are summarized for all the 2D materials-based ML DG-MOSFETs, which could meet Boltzmann's tyranny such as p-type GeSe (L g = 5-3 nm) SS = 60 mV dec À1 , [154] p-type MoSi 2 N 4 (L g = 3 nm) SS = 69.38 mV dec À1 , [160] p-type silicene (L g = 5 nm) SS = 67 mV dec À1 , [97] p-type lnSe (L g = 5 nm) SS = 64.00 mV dec À1 , [109] as well as n-type MoS 2 (L g = 1 nm) SS = 65 mV dec À1 , [130] n-type silicene (L g = 5 nm) SS = 65 mV dec À1 , [97] n-type MoTe 2 (L g = 3 nm) SS = 67 mV dec À1 , [137] and n-type SnSe 2 (L g = 4 nm) SS = 58 mV dec À1 [158] were calculated as per HP application standards.…”

Section: Subthreshold Swing (Ss)mentioning

confidence: 98%

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Sub‐5 nm 2D Semiconductor‐Based Monolayer Field‐Effect Transistor: Status and Prospects

Meena

Sharma

Jogi

2023

Physica Status Solidi (a)

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The objectives of the semiconductor industry include scaling down the silicon (Si)-based devices from bulk to nanoscale, reducing the effective cost, and improving the performance of the device. [1] Semiconductor devices such as metal-oxide semiconductor field-effect transistors (MOSFETs), field-effect transistors (FETs), complementary metal oxide semiconductor (CMOS) transistors, and other semiconductor devices with different architectures and scaling properties have been analyzed according to the guidelines of International Technology Roadmap for Semiconductors (ITRS), International Roadmap for Devices and Systems (IRDS), and Nano Electronics Roadmap for Europe: Identification and Dissemination (NEREID). Moore's law, followed for subsequent scaling down of MOSFETs, FETs, and CMOS devices using 3D semiconductors (Si, gallium nitride, and gallium arsenide), has become irrelevant in the nanoregime. [2,3] Challenges such as device degradation due to short channel effects, leakage current leading to mobility degradation, and heat dissipation issues or "heat death" of conventional 3D semiconductor-based nanodimensional CMOS devices and electronic circuits are faced due to dangling bonds, surface scattering states, undesirable coupling with phonons, creation of interface states, manifestation of the leakage current, static power problem, and large subthreshold swing (SS). [4][5][6] Search for alternate channel materials has been trending in the 2D semiconductor research in order to meet the above mentioned challenges.Richard Feynman, in 1959, introduced researchers to the concept of nanodimensions (<100 nm) and nanotechnology. The semiconductor industry has come a long way since then with newly engineered nanostructures such as carbon nanotubes (CNT), quantum dots, quantum wires, and nanofibers that have led to great advancements in nanotechnology with applications in biomedicine, pharmaceuticals, cosmetics, and environmental issues. [7] Nanomaterials are usually classified into four types based on quantum confinement and the device dimensions, at least one of which is in the nanorange (from 1 to 100 nm). Different types of nanomaterials are represented in Figure 1 and are described as follows. 1) 3D nanomaterials: The nanomaterials for which all three dimensions lie outside the nanometric scale (1-100 nm) are termed as 3D materials. The electrons are free to move in all three directions and thus there is no confinement or limitation for the flow of charge carriers. The bulk 3D nanomaterials consist of bundles of nanowires, nanotubes, bulk powders, or nanoparticles and multiple nanolayers or polycrystals. 2) 2D nanomaterials. The 2D nanomaterials have only one dimension in the nanometric scale whereas the other two dimensions lie outside the nanoscale (1-100 nm). These are similar to a planar structure. The electrons can easily move in two directions and are confined in one direction, for example, nano thin films, nanocoatings, nanolayers, nanosheets, etc. for 2D quantum well systems. 3) 1D nanomaterials: These nanoma...

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“…28,29 In recent years, SnSe 2 can be mechanically exfoliated to obtain 2D monolayers. The carrier mobility of the monolayer SnSe 2 is relatively high at 85 cm 2 V −1 s −1 at room temperature compared to that of typical transition metal disulfide (TMDs) nanosheets, 30 and it also has a low thermal conductivity 31 and is extensively used in photodetectors, 32 field effect transistors (FETs) 32 and solar cells. 33 It is noteworthy that when the external environment changes, the electronic characteristics of monolayer SnSe 2 are affected in a relatively sensitive way.…”

Section: Introductionmentioning

confidence: 99%

Theoretical design of a photodetector based on a two-dimensional SnSe₂/GaP type-II heterostructure

et al. 2023

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Device performance limit of monolayer SnSe2 MOSFET

Cited by 14 publications

References 47 publications

Prediction of Semiconducting 2D Nanofilms of Janus WSi₂P₂As₂ for Applications in Sub-5 nm Field-Effect Transistors

Prediction of Semiconducting 2D Nanofilms of Janus WSi₂P₂As₂ for Applications in Sub-5 nm Field-Effect Transistors

Sub‐5 nm 2D Semiconductor‐Based Monolayer Field‐Effect Transistor: Status and Prospects

Theoretical design of a photodetector based on a two-dimensional SnSe₂/GaP type-II heterostructure

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Device performance limit of monolayer SnSe2 MOSFET

Cited by 14 publications

References 47 publications

Prediction of Semiconducting 2D Nanofilms of Janus WSi2P2As2 for Applications in Sub-5 nm Field-Effect Transistors

Prediction of Semiconducting 2D Nanofilms of Janus WSi2P2As2 for Applications in Sub-5 nm Field-Effect Transistors

Sub‐5 nm 2D Semiconductor‐Based Monolayer Field‐Effect Transistor: Status and Prospects

Theoretical design of a photodetector based on a two-dimensional SnSe2/GaP type-II heterostructure

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Product

Resources

About

Prediction of Semiconducting 2D Nanofilms of Janus WSi₂P₂As₂ for Applications in Sub-5 nm Field-Effect Transistors

Prediction of Semiconducting 2D Nanofilms of Janus WSi₂P₂As₂ for Applications in Sub-5 nm Field-Effect Transistors

Theoretical design of a photodetector based on a two-dimensional SnSe₂/GaP type-II heterostructure