2011 Brazilian Symposium on Computing System Engineering 2011
DOI: 10.1109/sbesc.2011.24
|View full text |Cite
|
Sign up to set email alerts
|

Device Driver Generation and Checking Approach

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1
1

Citation Types

0
8
0

Year Published

2014
2014
2018
2018

Publication Types

Select...
3
1
1

Relationship

1
4

Authors

Journals

citations
Cited by 5 publications
(8 citation statements)
references
References 5 publications
0
8
0
Order By: Relevance
“…Although the current approach has only been validated in real hardware, there are already MDDC models in SystemC, on which experiments are also being carried out. The feasibility of this type of checking in high level models has been previously established in [9].…”
Section: Experiments and Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…Although the current approach has only been validated in real hardware, there are already MDDC models in SystemC, on which experiments are also being carried out. The feasibility of this type of checking in high level models has been previously established in [9].…”
Section: Experiments and Resultsmentioning
confidence: 99%
“…2, the front-end of this approach is a high-level specification written in a domain-specific language (DSL) called TDevC, which contains the interface descriptions and the communication protocol of the devices. This language has been under development since 2009 and has been extended to allow more complex specification of register access constraints as well as to allow sequences of register accesses, as observed in [9,10], including this current syntax and expression power.…”
Section: Introductionmentioning
confidence: 99%
“…The modules of the proposed monitoring mechanism are partially generated from a highlevel device specification in TDevC [4]. The SystemVerilog implementation of the generated modules can be synthesized in hardware (FPGA) and can be integrated with the complete system platform prototyped in FPGA.…”
Section: The Driver/device Communication Monitoring Approachmentioning
confidence: 99%
“…As it can be seen in the Figure 1, the MDDC module captures the communication between the device controller and the driver; depending on the type of communication, the corresponding FSM checks if it will cause an incorrect behavior of the device and of the system. A first version of the monitoring mechanism has been proposed in [4].But this version was a very simple one and was able for verifying only reading and writing operations in a rather restrictive way.…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation