2008
DOI: 10.1016/j.orgel.2008.06.004
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Device characteristics of polymer dual-gate field-effect transistors

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Cited by 59 publications
(57 citation statements)
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“…8 The challenge for the realization of the Bio-FET is the attachment of the analyte receptor to the surface of the top insulator. For this purpose we functionalized the insulator with maleimide side-chains, that can chemically bind to thiol groups.…”
Section: Introductionmentioning
confidence: 99%
“…8 The challenge for the realization of the Bio-FET is the attachment of the analyte receptor to the surface of the top insulator. For this purpose we functionalized the insulator with maleimide side-chains, that can chemically bind to thiol groups.…”
Section: Introductionmentioning
confidence: 99%
“…6 To improve the sensitivity beyond the Nernstian response, we changed the layout of the ISFET by adding a second gate. [7][8][9][10] A schematic layout of the resulting dual-gate transducer is shown in Fig. 1.…”
Section: Beyond the Nernst-limit With Dual-gate Zno Ion-sensitive Fiementioning
confidence: 99%
“…7,8 In order to address these conflicting observations, we study the charge transport properties of DPP-based ambipolar semiconducting polymers embedded in dual-gate field-effect transistors (DGFETs) comprising two separate dielectric/ semiconductor interfaces in a single transistor. 9,10 In fact, the DGFET structure is the best platform for studying the effects of different dielectrics upon device performance with minimal influence from external parameters, such as sample-to-sample variation, because the devices share an identical active semiconductor layer. 9,10 In the present work, we perform temperature-dependent transfer-curve measurements on the DGFETs in the range of 120-260 K. Based on these measurements, we analyze the spatial charge-transporting behavior of holes in the active DPP-based semiconducting layer interfacing with the organic top-gate (TG) and SiO 2 bottomgate (BG) dielectric layers.…”
mentioning
confidence: 99%
“…9,10 In fact, the DGFET structure is the best platform for studying the effects of different dielectrics upon device performance with minimal influence from external parameters, such as sample-to-sample variation, because the devices share an identical active semiconductor layer. 9,10 In the present work, we perform temperature-dependent transfer-curve measurements on the DGFETs in the range of 120-260 K. Based on these measurements, we analyze the spatial charge-transporting behavior of holes in the active DPP-based semiconducting layer interfacing with the organic top-gate (TG) and SiO 2 bottomgate (BG) dielectric layers. We also correlate key chargetransport parameters with the dielectric layers that we have studied.…”
mentioning
confidence: 99%