Development of the data acquisition system for terahertz spectrometer

Abstract

In most Terahertz time-domain spectrometer (THz-TDS) experiments, the lock-in amplifier works with trans-impedance pre-amplifier to amplitude the terahertz pulse accepted from detector. This paper discusses the development of data acquisition system for the transmission THz-TDS. In this system, the cross-correlation software algorithm in SR830 lock-in amplifier from Stanford Research Systems, that is usually used in THz-TDS, has been replaced by parallel hardware algorithm of Field Programmable Gate Array (FPGA) chip with the parallel processing ability. This chip has a faster processing speed and higher accuracy than others. A 24 bit Delta-Sigma Analog Digital (AD) was used in place of the 16 bit successive approximation ADC of SR830. The new AD convertor can reduce the complexity of trans-impedance pre-amplifier circuit and replace the SR555 current amplifiers that designed to work with SRS lock-in amplifiers. Besides trans-impedance pre-amplifier circuit, all function circuits, such as low-pass digital filter, phase-locked loop, Direct Digital Synthesis (DDS) reference source and the core algorithms, are integrated in a FPGA chip, which make the new designed lock-in amplifier with a small volume reduce a dozen times SR830 size.

A New Method of Eddy Current Impedance-Extracting and Hardness-Classifying for Valves

“…When the frequencies of the two signals are not equal, the output must be zero after long-term integration and averaging, indicating that the two signals of the different frequencies are uncorrelated. There can only be an in-phase output of the cross-correlation functions when the frequencies of the two signals are completely equal ( 1 = 2 ), which is presented by equation (9).…”

“…The processing and analysis of an impedance signal, such as Fourier analysis (FA) and wavelet analysis (WA), are continuously applied to eddy current testing [9]. Since the processing time of the Fourier transform increases exponentially with the number of sampling points, the dimensions and number of features are large, which makes subsequent processing based on these features inconvenient.…”

“…An accurate and quick extraction of the impedance features with the testing coil of the eddy current is the first and essential step to achieve an online hardness classification with an eddy current. A lock-in amplifier (LIA) is commonly used to measure the amplitudes of impedance components and the phases of impedance signals in conventional eddy current testing, which has the advantage of simultaneously obtaining the magnitudes of the resistance and inductance components [9], [10]; however, LIAs are uncontrollable for the online extraction of features in manufacturing processes, and difficulties are encountered in the integration of impedance processing with subsequent classification [11].…”

An Accurate DDS Method Using Compound Frequency Tuning Word and Its FPGA Implementation

“…The DDS device based on FPGA is usually composed of a phase accumulator, a waveform memory and a digital multiplier [11,12]. The phase accumulator accumulates the frequency tuning word loop to get the phase address; the size of the frequency tuning word determines the output frequency value; waveform memory stores a sampling point for a periodic output waveform; the phase address of the phase accumulator acts as the reading address of the waveform memory, from which the waveform sample points are taken out to form the digital waveform, and then the analog signal is obtained by further processing [13].…”

“…To solve this problem, a DDS method using compound frequency tuning word is designed and implemented in this paper, which is expected to further improve the accuracy of synthetic frequency under the condition of guaranteeing frequency stability. of the waveform memory, from which the waveform sample points are taken out to form the digital waveform, and then the analog signal is obtained by further processing [13]. As mentioned above, the frequency synthesis principles of the dedicated DDS integrated chip and the FPGA method are basically the same.…”