Development of Load Balancer and Parallel Database Management Module

Gibadullin, R. F.; Vershinin, I. S.; Minyazev, R. Sh.

doi:10.1109/icieam.2018.8728629

Cited by 15 publications

(1 citation statement)

References 11 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Currently, much attention is paid to solving a wide variety of problems in using multiprocessor computer systems, the elements of which are the general-purpose processor elements [9][10][11][12][13]. At the same time, the matters of implementing distributed algorithms on DPAS, the elements of which are FPGAs, have been studied insufficiently.…”

Section: Resultsmentioning

confidence: 99%

Distributed image processing based on the same IP-cores in FPGA-architecture

Zakharov

Shalagin²,

Eminov

2019

Proceedings of the v International Conference Information Technology and Nanotechnology 2019

View full text Add to dashboard Cite

The problem of processing images, i. e., two-dimensional data arrays, was solved through implementing two-dimensional fast Fourier transform (FFT) when using single-type hardware modules – IP-cores in the Virtex-6 FPGA architecture. We have shown the possibility of the parallel implementation of each stage in the two-dimensional FFT, based on four “butterfly”-type transforms (BTr) over four elements of the data array being processed. Estimations were obtained regarding time- and hardware complexity of the IPcore implementing BTrs and used in implementing the one-dimensional FFT. The results obtained can be used in estimating hardware and time consumption when performing a twodimensional FFT over an array of the pre-defined dimensionality in using existing and forthcoming distributed programmable-architecture systems.

show abstract

Section: Resultsmentioning

confidence: 99%