Development of DMA controller for real time data processing in FPGA based embedded application

Bakshi, Abhisek; Burman, Aditi; chakraborty, Amlan

doi:10.9790/4200-04220108

Cited by 1 publication

(1 citation statement)

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“…The DMA controller sends a real-time analogue signal to the dual data rate (DDR2) Static /Dynamic RAM SDRAM. The analogue data form function generator is transformed to digital bits before being sent to DDR2 SDRAM through the DMA controller (Bakshi et al , 2014).…”

Section: Related Workmentioning

confidence: 99%

A novel utilization-aware and power-delay-aware intelligent DMA controller for video streaming used in AI applications

B.¹,

E.²

2022

IJPCC

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Purpose In real-time entertainment processing applications, processing of the multiple data streams demands high efficient multiple transfers, which leads to the computational overhead for system-on-chip (SoC), which runs the artificial intelligence algorithms. High-performance direct memory access controller (DMAC) is incorporated in SoC to perform the multiple data transfers without the participation of main processors. But achieving the area-efficient and power-aware DMAC suitable for streaming the multiple data remains to be a daunting challenge among the researchers. Design/methodology/approach The purpose of this paper to provide the DMA operations without intervention of central processing unit (CPU) for bulk video data transmissions. Findings The proposed DMAC has been developed based on the hybrid advanced extensible interface (AXI)-PCI bus subsystem to handle the multiple data streams from the video sources. The proposed model consists of bus selector module, user control signal, status register, DMA-supported address and AXI-PCI subsystems to achieve better performance in analysing the video frames. Originality/value The extensive experimentation is carried out with Xilinx Zynq SoC architecture using Very High Speed integrated circuit hardware description language (VHDL) programming, and performance metrics such as utilization area and power are calculated and compared with the other existing DMA controllers such as Scatter-DMA, Gather-DMA and Enhanced DMA. Simulation results demonstrate that the proposed DMAC has outperformed other existing DMAC in terms of less area, less delay and power, which makes the proposed model suitable for streaming multiple video streams.

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Section: Related Workmentioning

confidence: 99%