Development of capacity indices for semiconductor fabrication

Abstract

A typical semiconductor fabrication process contains 300 to 1000 steps and its variation depends on the product complexity. Most of the processes are re-entrance to same equipments especially at photolithography, etching, implanter, film deposition, chemical mechanical polishing (CMP) and cleaning. For example, photolithography steps for island, poly, and contact module will be processed at same equipment. Another complication is that the equipment types are different from one to another resulting in different approach for cycle time calculation, difference in availability and efficiency. The objective of this paper is to establish capacity indices to guide for monthly output in semiconductor fabrication facilities. The approach in this paper is using the waterfall chart for individual process and equipment types. Data extraction is being done through reporting systems of Advance Productivity Family (APF), an industrial standard software for data collection that is integrated with individual equipment and product processing historical data. The data was then analyzed using JMP to check for sanity. Results were used to develop capacity indices, which are wafer per hour (wph), manufacturing efficiency, and equipment availability. All these information will be later used to develop the final capacity figure. The final capacity number will then be used to guide the planning team to schedule product combination that will achieve monthly and quarterly wafer shipment goal to customers. This approach reached accuracy of 99% compared to actual throughput. In conclusion, this approach helps the company to provide planning guidelines in meeting the financial goals.Index Terms-Advance Productivity Family (APF), Chemical mechanical polishing (CMP), Work In progress (WIP), wafer per hour (wph)

Fundamental simulation studies of CONWIP in front-end wafer fabrication

“…Each job makes several visits to the workstations, which place different layers onto the job. Typically, 30% or more of process steps are re-entrant [7]. Given a limited resource capacity, re-entrant process flow creates complex competition among wafers at different manufacturing stages.…”

Horrendous capacity cost of semiconductor wafer manufacturing

“…Again this is a short term measure where fabs buy time before additional capacity is available in house. Customers also do not prefer their wafers to be fabricated elsewhere where they have less visibility and control [8] [9]. Customers will also demand reduction in ASP (average selling price) [9].…”

Discrete event simulation modeling for semiconductor fabrication operation

“…Process to fabricate a chip on a wafer required 300 to 1000 steps process re-entrance to similar equipment more than 30% of the total steps, cycle time can be up to 90 days depends to complexity and priority given for a product with minimum of 60 equipment. Notice the ratio between number of steps and equipment is almost 5 times, which is due to the wafer fabrication process is not like a single line assembly process in normal factory instead of re-entrance back to the same process [2] [3]. Fig.…”