Development of a super B-factory monolithic active pixel detector—the Continuous Acquisition Pixel (CAP) prototypes

Varner, G.; Barbero, M.; Bożek, A.; Browder, T. E.; Fang, F.; Hazumi, M.; Igarashi, Akinori; Iwaida, S.; Kennedy, J. Ward; Kent, N.; Olsen, S. L.; Pałka, H.; Rosen, M.; Ruckman, L.; Stanič, S.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.

doi:10.1016/j.nima.2005.01.053

Cited by 31 publications

(9 citation statements)

References 8 publications

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“…CMOS MAPS prototypes have been developed by several groups over the last few years [8,9,10,11]. These designs follow the very simple readout scheme already adopted for imaging applications, based on the use of only three transistors on the pixel cell (3T), with a sequential readout.…”

Section: Randd On Cmos Maps Designmentioning

confidence: 99%

Vertex Detectors for a Super-B factory

Rizzo¹

2008

Proceedings of the 16th International Workshop on Vertex Detectors — PoS(Vertex 2007)

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Section: Randd On Cmos Maps Designmentioning

confidence: 99%

Vertex Detectors for a Super-B factory

Rizzo¹

2008

Proceedings of the 16th International Workshop on Vertex Detectors — PoS(Vertex 2007)

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“…CMOS Monolithic Active Pixel Sensors (MAPS) represent a promising candidate for the innermost layer of the vertex detectors for experiments at future colliders such as SuperB or ILC ( [1]- [3]). Their thin active volume (few tens of microns thick) allows a significant reduction of the material budget with respect to standard hybrid pixels.…”

Section: Introductionmentioning

confidence: 99%

Characterization of deep N-well CMOS MAPS for the ILC Vertex Detector

Traversi¹

2008

Proceedings of the 16th International Workshop on Vertex Detectors — PoS(Vertex 2007)

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“…In this technology the signal collected is only few hundreds of electrons, for typical p-epitaxial thickness of about 10μm. CMOS MAPS prototypes have been developed by several groups over the last few years [2], [3], [4], [5]. These designs follow the very simple readout scheme already adopted for imaging applications, based on the use of only three transistors on the pixel cell (3T), with a sequential readout.…”

Section: Introductionmentioning

confidence: 99%

Recent development on triple well 130 nm CMOS MAPS with in-pixel signal processing and data sparsification capability

Rizzo

Batignani

Bettarini

et al. 2007

2007 IEEE Nuclear Science Symposium Conference Record

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A different approach to the design of CMOS MAPS has recently been proposed. By exploiting the triple well option of a CMOS commercial process, a deep n-well (DNW) MAPS sensor has been realized with a full in-pixel signal processing chain: charge preamplifier, shaper, discriminator and a latch. This readout approach beeing compatible with data sparsification will improve the readout speed potential of MAPS sensors. The first protoype chips, realized with STMicroelectronics 130 nm triple well process, proved the new design proposed for DNW MAPS is viable with a good sensitivity to photons from 55 Fe and electrons from 90 Sr. Extensive tests performed to characterize the second generation of the APSEL chips based on the DNW MAPS design are reported. Small 3x3 pixel matrices with full analog output have been tested with radioactive sources to characterize charge collection. Pixel noise equivalent charge (ENC) of 50 e-and Signal-to-Noise ratio for MIPs of about 14 have been measured. Improved pixel noise and reduced threshold dispersion (about 100 e-) have been measured in the 8x8 matrix with a sequential readout. Based on the new DNW MAPS design a dedicated fast readout architecture to perform on-chip data sparsification is currently under development. The aim is to incorporate in the same detector the advantages of the thin CMOS sensors and similar functionalities as in hybrid pixels.Index Terms-Monolithic active pixel sensors, MAPS, CMOS pixels, charged particle tracking.

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Development of a super B-factory monolithic active pixel detector—the Continuous Acquisition Pixel (CAP) prototypes

Cited by 31 publications

References 8 publications

Vertex Detectors for a Super-B factory

Vertex Detectors for a Super-B factory

Characterization of deep N-well CMOS MAPS for the ILC Vertex Detector

Recent development on triple well 130 nm CMOS MAPS with in-pixel signal processing and data sparsification capability

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