Development of a 64-Channel Readout ASIC for an SSPM Array for PET and TOF-PET Applications

Zhu, Xiaobiao; Deng, Zhi; Chen, Yu; Liu, Yinong; Liu, Yaqiang

doi:10.1109/tns.2016.2518808

Cited by 27 publications

(17 citation statements)

References 18 publications

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“…6a). Low-power ASICs found in literature also show a worse performance than other ASIC models with a higher power consumption [47]. However, since the TOFPET2 trigger circuit is capable of rejecting noise events, the TOFPET2 ASIC still delivers CRTs down to 300 ps at 3.6 mW/channel power consumption, which is only a 20 ps performance loss compared to the default setting.…”

Section: Discussionmentioning

confidence: 97%

Investigation of the Power Consumption of the PETsys TOFPET2 ASIC

Nadig

Weissler

Radermacher

et al. 2020

IEEE Trans. Radiat. Plasma Med. Sci.

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In state-of-the-art positron emission (PET) tomography systems, application-specific integrated circuits (ASICs) are commonly used to precisely digitize the signals of analog silicon photo-multipliers (SiPMs). However, when operating PET electronics in a magnetic resonance (MR) system, one faces the challenge of mutual interference of these imaging techniques. To prevent signal deterioration along long analog signal lines, PET electronics with a low power consumption digitizing the signals close to the SiPMs are preferred. In this study, we evaluate the power consumption of the TOFPET2 ASIC. Its power consumption ranges from 3.6 mW/channel to 7.2 mW/channel as a function of the input stage impedance and discriminator noise settings. We present an analytical model allowing to compute the power consumption of a given ASIC configuration. The configured input stage impedance and discriminator noise have an impact on the coincidence resolution time, energy resolution, and dark count rate. Since TOFPET2 ASICs delivers state-ofthe art performance with a power consumption similar or even lower than other ASICs typically used for PET applications, it is a favorable candidate to digitize the signals of SiPMs in future simultaneous PET/MR systems.

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Section: Discussionmentioning

confidence: 97%

Investigation of the Power Consumption of the PETsys TOFPET2 ASIC

Nadig

Weissler

Radermacher

et al. 2020

IEEE Trans. Radiat. Plasma Med. Sci.

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“…Fig. 6 (f) and (g) are pictures of two individual scintillator blocks, each block is read out by an 8 × 16 SiPM array (FJ30035, ON Semiconductor, USA) and an ASIC developed by our group [23,[31][32][33][34]. The active area for each SiPM unit is 3 mm × 3 mm.…”

Section: ) Experimental Prototypementioning

confidence: 99%

Self-Collimating SPECT With Multi-Layer Interspaced Mosaic Detectors

Quan

Lyu

et al. 2021

IEEE Trans. Med. Imaging

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Conventional singlephoton emission computed tomography (SPECT) relies on mechanical collimation whose resolution and sensitivity are interdependent, the best performance a SPECT system can attain is only a compromise of these two equally desired properties. To simultaneously achieve high resolution and sensitivity, we propose to use sensitive detectors constructed in a multi-layer interspaced mosaic detectors (MATRICES) architecture to accomplish part of the collimation needed. We name this new approach selfcollimation.We evaluate three self-collimating SPECT systems and report their imaging performance: 1) A simulated human brain SPECT achieves 3.88% sensitivity, it clearly resolves 0.5-mm and 1.0-mm hot-rod patterns at noise-free and realistic count-levels, respectively; 2) a simulated mouse SPECT achieves 1.25% sensitivity, it clearly resolves 50-μm and 100-μm hot-rod patterns at noise-free and realistic count-levels, respectively; 3) a SPECT prototype achieves 0.14% sensitivity and clearly separates 0.3-mm-diameter point sources of which the center-to-center neighbor distance is also 0.3 mm. Simulated contrast phantom studies show excellent resolution and signal-to-noise performance.The unprecedented system performance demonstrated by these 3 SPECT scanners is a clear manifestation of the superiority of the self-collimating approach over conventional mechanical collimation. It represents a potential paradigm shift in SPECT technology development.

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“…The output impedance of the SiPM detector is finite since each SiPM detector is composed of thousands of microcells in parallel connection, therefore a readout circuit with low input impedance is essential to achieve high bandwidth to prevent significant loss of the SiPM output currents. Comparing with voltage-mode readout structure, current-mode input buffer can conveniently provide a lower input impedance [2]. In Fig.…”

Section: Current Buffer With On-chip Hpfmentioning

confidence: 99%

A SiPM Readout Front-end with Fast Pulse Generation and Successive-Approximation Register ADC

Townsend¹,

Tang²,

Chen³

2020

Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2019)

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A low-power front-end with on-chip fast pulse generation and customized 10-bit single-ended SAR ADC is developed for SiPM readout design. The on-chip fast pulse generation improves the timing resolution without the need of extra I/O pins. The proposed SAR ADC, reusing the SiPM charge integrator and eliminating the power-hungry charging sensitive amplifier, consumes significantly less power compared with conventional solutions. Designed in a 0.18 μm 1P6M bulk CMOS technology, the front-end contains 16 channels of SiPM readouts, and each channel consumes a power of 3.8 mW. With on-chip HPF to shape input signals, the fast pulse generation approach reduces the long-tailed SPE pulses width from 50 ns to 3 ns. At 16 MS/s, the SAR ADC consumes 743 μW from a 1.8 V supply and achieves a SNDR of 57.53 dB and a SFDR of 66.31 dB, respectively.

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Development of a 64-Channel Readout ASIC for an SSPM Array for PET and TOF-PET Applications

Cited by 27 publications

References 18 publications

Investigation of the Power Consumption of the PETsys TOFPET2 ASIC

Investigation of the Power Consumption of the PETsys TOFPET2 ASIC

Self-Collimating SPECT With Multi-Layer Interspaced Mosaic Detectors

A SiPM Readout Front-end with Fast Pulse Generation and Successive-Approximation Register ADC

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