Abstract:A low-power front-end with on-chip fast pulse generation and customized 10-bit single-ended SAR ADC is developed for SiPM readout design. The on-chip fast pulse generation improves the timing resolution without the need of extra I/O pins. The proposed SAR ADC, reusing the SiPM charge integrator and eliminating the power-hungry charging sensitive amplifier, consumes significantly less power compared with conventional solutions. Designed in a 0.18 μm 1P6M bulk CMOS technology, the front-end contains 16 channels … Show more
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