Developing Scheduler Test Cases to Verify Scheduler Implementations In Time-Triggered Embedded Systems

Nahas, Mouaaz; Bautista-Quintero, Ricardo

doi:10.5121/ijesa.2016.6201

Cited by 3 publications

(4 citation statements)

References 43 publications

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“…Nahas and Bautista-Quintero [25] introduced Scheduler Test Case (STC) as a new technique which provides a systematic procedure for documenting and testing. STC supplies a black box tool which predicts the behavior of implementation sets of the real time scheduling algorithms.…”

Section: Related Workmentioning

confidence: 99%

sOrTES: A Supportive Tool for Stochastic Scheduling of Manual Integration Test Cases

et al. 2019

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The main goal of software testing is to detect as many hidden bugs as possible in the final software product before release. Generally, a software product is tested by executing a set of test cases, which can be performed manually or automatically. The number of test cases which are required to test a software product depends on several parameters such as the product type, size, and complexity. Executing all test cases with no particular order can lead to waste of time and resources. Test optimization can provide a partial solution for saving time and resources which can lead to the final software product being released earlier. In this regard, test case selection, prioritization, and scheduling can be considered as possible solutions for test optimization. Most of the companies do not provide direct support for ranking test cases on their own servers. In this paper, we introduce, apply, and evaluate sOrTES as our decision support system for manual integration of test scheduling. sOrTES is a Python-based supportive tool which schedules manual integration test cases which are written in a natural language text. The feasibility of sOrTES is studied by an empirical evaluation which has been performed on a railway use-case at Bombardier Transportation, Sweden. The empirical evaluation indicates that around 40% of testing failure can be avoided by using the proposed execution schedules by sOrTES, which leads to an increase in the requirements coverage of up to 9.6%.

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Section: Related Workmentioning

confidence: 99%

sOrTES: A Supportive Tool for Stochastic Scheduling of Manual Integration Test Cases

et al. 2019

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“…It can be seen that effective scheduling techniques are the need for the TTC architecture because an inappropriate task scheduling may cause all tasks set cannot be scheduled at all. Moreover, if the scheduler is implemented improper behavior, this problem can lead to high levels of task release jitter and also increased power consumption in the system [9]- [11].…”

Section: Modified Automated Scheduling Technique Of Ttc Schedulermentioning

confidence: 99%

“…Function call tree for the TTC-Dispatch scheduler (adapted from[2]) Function call tree for the TTC-MTI scheduler (adapted from[9]). International Journal ofEngineering and Technology, Vol.…”

mentioning

confidence: 99%

Automated Scheduling Technique Based on Multiple Timer Interrupts for Time-Triggered Co-operative Architecture

Kuankid¹,

Aurasopon²

2017

IJET

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Time-triggered system provides more attractive options for many safety-related and safety-critical embedded systems. The work is mainly concerned with developing novel scheduling algorithms and implementation techniques which can be automated and ensured predictability during the process of time-triggered cooperative architecture. The major objective of this work is to modify an automated scheduling technique for use with time-triggered cooperative based on the employment of multiple timer interrupts. The results show that proposed algorithm provides the effective schedulability and can help in a significant reduction of scheduling time as compared with a traditional scheduler. Index Terms-Time-triggered architecture, time-triggered cooperative scheduler, multiple timer interrupts.

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“…The majority of software in embedded systems is written in the two programming languages C (51 %) and C++ (30 %) [12]; both are often processed by the same tools such as Clang/LLVM. In a satellite project, we have developed a tailored file system for the embedded use on a satellite.…”

Section: Introductionmentioning

confidence: 99%

Source Code Verification for Embedded Systems using Prolog

Flederer

Ostermayer

Seipel

et al. 2017

Electron. Proc. Theor. Comput. Sci.

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System relevant embedded software needs to be reliable and, therefore, well tested, especially for aerospace systems. A common technique to verify programs is the analysis of their abstract syntax tree (AST). Tree structures can be elegantly analyzed with the logic programming language Prolog. Moreover, Prolog offers further advantages for a thorough analysis: On the one hand, it natively provides versatile options to efficiently process tree or graph data structures. On the other hand, Prolog's non-determinism and backtracking eases tests of different variations of the program flow without big effort. A rule-based approach with Prolog allows to characterize the verification goals in a concise and declarative way. In this paper, we describe our approach to verify the source code of a flash file system with the help of Prolog. The flash file system is written in C++ and has been developed particularly for the use in satellites. We transform a given abstract syntax tree of C++ source code into Prolog facts and derive the call graph and the execution sequence (tree), which then are further tested against verification goals. The different program flow branching due to control structures is derived by backtracking as subtrees of the full execution sequence. Finally, these subtrees are verified in Prolog. We illustrate our approach with a case study, where we search for incorrect applications of semaphores in embedded software using the real-time operating system RODOS. We rely on computation tree logic (CTL) and have designed an embedded domain specific language (DSL) in Prolog to express the verification goals.Comment: In Proceedings WLP'15/'16/WFLP'16, arXiv:1701.0014

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Developing Scheduler Test Cases to Verify Scheduler Implementations In Time-Triggered Embedded Systems

Abstract: ABSTRACT

Cited by 3 publications

References 43 publications

sOrTES: A Supportive Tool for Stochastic Scheduling of Manual Integration Test Cases

sOrTES: A Supportive Tool for Stochastic Scheduling of Manual Integration Test Cases

Automated Scheduling Technique Based on Multiple Timer Interrupts for Time-Triggered Co-operative Architecture

Source Code Verification for Embedded Systems using Prolog

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