Deterministic Skip Lists in Analog Topological Placement

Maruvada, S.C.; Berkman, A.; Krishnamoorthy, Karthik; Balasa, Florin

doi:10.1109/icasic.2005.1611437

Cited by 6 publications

(6 citation statements)

References 10 publications

(21 reference statements)

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“…Specifically, the packing complexity of the previous works [8]- [10], [15]- [17], [19] are all O(n 2 ) time while those of [3], [12]- [14] need O(n lg n) time (the work in [18] requires O(m · n lg lg n) time, which was the fastest previous work).…”

Section: B Our Contributionsmentioning

confidence: 99%

“…Balasa et al derived the symmetric-feasible conditions for several popular floorplan representations including sequence pairs (SPs) [8], O-tree [9], and binary trees [10]. To explore the solution space in the symmetric-feasible binary trees, they augmented the B * -tree [11] using various data structures, including segment trees [3], [12], red-black trees [13], and deterministic skip lists [14]. Lin et al [15] also presented the symmetric-feasible conditions for the TCG-S representation.…”

Section: A Previous Workmentioning

confidence: 99%

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Analog Placement Based on Symmetry-Island Formulation

Lin

Chang

Lin³

2009

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-To reduce the effect of parasitic mismatches and circuit sensitivity to thermal gradients or process variations for analog circuits, some pairs of modules need to be placed symmetrically with respect to a common axis, and the symmetric modules are preferred to be placed at closest proximity for better electrical properties. Most previous works handle the problem with symmetry constraints by imposing symmetric-feasible conditions in floorplan representations and using cost functions to minimize the distance between symmetric modules. Such approaches are inefficient due to the large search space and cannot guarantee the closest proximity of symmetry modules. In this paper, we present the first linear-time-packing algorithm for the placement with symmetry constraints using the topological floorplan representations. We first introduce the concept of a symmetry island which is formed by modules of the same symmetry group in a single connected placement. Based on this concept and the B * -tree representation, we propose automatically symmetric-feasible (ASF) B * -trees to directly model the placement of a symmetry island. We then present hierarchical B * -trees (HB * -trees) which can simultaneously optimize the placement with both symmetry islands and nonsymmetric modules. Unlike the previous works, our approach can place the symmetry modules in a symmetry group in close proximity and significantly reduce the search space based on the symmetry-island formulation. In particular, the packing time for an ASF-B * -tree or an HB * -tree is the same as that for a plain B * -tree (only linear) and much faster than previous works. Experimental results show that our approach achieves the best-published quality and runtime efficiency for analog placement.

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Section: B Our Contributionsmentioning

confidence: 99%

Section: A Previous Workmentioning

confidence: 99%

Analog Placement Based on Symmetry-Island Formulation

Lin

Chang

Lin³

2009

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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“…Balasa et al derived the symmetric-feasible conditions for several popular floorplan representations including sequence pairs [1], O-tree [13], and binary trees [2]. To explore the solution space in the symmetric-feasible binary trees, they augmented the B*-tree [6] using various data structures, including segment trees [3,5], red-black trees [4], and deterministic skip lists [12]. Lin et al [11] also presented the symmetric-feasible conditions for the TCG-S representation.…”

Section: Previous Workmentioning

confidence: 99%

Analog Placement Based on Novel Symmetry-Island Formulation

Lin¹,

Lin²

2007

2007 44th ACM/IEEE Design Automation Conference

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In this paper, we present the first amortized linear-time packing algorithm for the placement with symmetry constraints. We first introduce the concept of a symmetry island which is formed by modules of the same symmetry group in a single connected placement. Based on this concept and the B*-tree representation, we propose automatically symmetric-feasible B*-trees (ASF-B*-trees) to directly model the placement of a symmetry island. Unlike the previous works that can handle only 1D symmetry constraints, our ASF-B*-tree is the first in the literature to additionally consider 2D symmetry. We then present hierarchical B*-trees (HB*-trees) which can simultaneously optimize the placement with both symmetry islands and non-symmetry modules. Unlike the previous works, our approach can guarantee the close proximity of symmetry modules and significantly reduce the search space based on the symmetry-island formulation. In particular, the packing time for an ASF-B*tree or an HB*-tree is the same as that for a plain B*-tree (only amortized linear) and much faster than previous works which need at least loglinear time. Experimental results show that our approach achieves the best published quality and runtime efficiency for analog placement.

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“…Specifically, the packing complexity of the previous works [1,2,9,11,13,14] are all O(n 2 ) time while those of [3,4,5,12] need O(n lg n) time.…”

Section: Our Contributionsmentioning

confidence: 99%

Section: Previous Workmentioning

confidence: 99%

Analog placement based on novel symmetry-island formulation

Lin

Lin²

2007

Proceedings of the 44th Annual Conference on Design Automation - DAC '07

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In this paper, we present the first amortized linear-time packing algorithm for the placement with symmetry constraints. We first introduce the concept of a symmetry island which is formed by modules of the same symmetry group in a single connected placement. Based on this concept and the B*-tree representation, we propose automatically symmetric-feasible B*-trees (ASF-B*-trees) to directly model the placement of a symmetry island. Unlike the previous works that can handle only 1D symmetry constraints, our ASF-B*-tree is the first in the literature to additionally consider 2D symmetry. We then present hierarchical B*-trees (HB*-trees) which can simultaneously optimize the placement with both symmetry islands and non-symmetry modules. Unlike the previous works, our approach can guarantee the close proximity of symmetry modules and significantly reduce the search space based on the symmetry-island formulation. In particular, the packing time for an ASF-B*-tree or an HB*-tree is the same as that for a plain B*-tree (only amortized linear) and much faster than previous works which need at least loglinear time. Experimental results show that our approach achieves the best published quality and runtime efficiency for analog placement.

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Deterministic Skip Lists in Analog Topological Placement

Cited by 6 publications

References 10 publications

Analog Placement Based on Symmetry-Island Formulation

Analog Placement Based on Symmetry-Island Formulation

Analog Placement Based on Novel Symmetry-Island Formulation

Analog placement based on novel symmetry-island formulation

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