Detection and analysis of early failures in electromigration

Gall, Martin; Capasso, C.; Jawarani, D.; Hernandez, Richard; Kawasaki, H.; Ho, Paul S.

doi:10.1063/1.125603

Cited by 17 publications

(16 citation statements)

References 6 publications

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“…Previous work by Gall et al 20,21 has shown that the reliability of Albased interconnects does not show significant deviation from monomodal behavior down to nearly 1 part in 10 5 interconnects. In the case of DD Cu, the presence of two distinct interfacial flux divergence regions means that a bimodal distribution of failures may be an intrinsic characteristic of this technology.…”

Section: Cu Dd Versus Al(cu) Interconnectmentioning

confidence: 92%

“…The presence of early failures in small amounts in an interconnect population would be undetectable in the small samplings (20 or so) typically used for EM testing. Gall et al 20,21,40 have shown a useful method by which "early" or "extrinsic failure" on a very large scale in Al(Cu) technology can be characterized. The method uses multiply linked chains of long interconnects to enhance the sensitivity of interconnect populations to early failures.…”

Section: Weakest Link Approximation and Failure Distributionsmentioning

confidence: 99%

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Reliability and early failure in Cu/oxide dual-damascene interconnects

Ogawa

Lee

Matsuhashi

et al. 2002

Journal of Elec Materi

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The drive toward greater device density and higher performance in Si-based microelectronics technology has led to the recent transition to newer backend interconnect materials. However, this transition must be accomplished without sacrificing the reliability requirements necessary for long-term product functionality. 1,2 The recent introduction of Cu metallization to replace Al(Cu) technology is one example, 3 but the transition will also later require the incorporation of new and often exotic low-k interlevel and intralevel dielectrics as well as ultrathin Cu DB materials. The rapid introduction of new materials in advanced integrated circuit technology is in marked contrast to the seemingly less turbulent prior history-at least from a materials perspective-in microelectronics. All this materials change will also be done under a new interconnect integration architecture: the single-damascene (SD) and dual-damascene (DD) processes. The impact of these new materials and integration scheme on interconnect reliability, such as electromigration (EM) and stress-induced voiding, is still presently not well understood, and the literature on Cu/low-k reliability is still rather sparse. Yet, the knowledgebase is growing, and certain aspects of the effect of the damascene architecture on at least EM reliability are becoming clearer. DD Interconnects: Basic ArchitectureThe basic layout of a Cu-based, submicron, twolevel interconnect suitable for study of EM phenomena in DD systems is shown in Fig. 1a. The DD interconnect is placed at the upper metal level (M2), while a SD interconnect is used at the lower level metal (M1). The Cu metal is surrounded by a thin Ta diffusion barrier (DB) around its sides and bottom and by a capping layer (CL, typically SiN x ) on top. A typical barrier thickness may range between 100 and 300 Å, but the thickness on the via sidewall may be thinner by, say, 25-50%. The CL thickness is typically in the range of 1000 Å. The specific thickness dimensions of these films may vary depending on the technology node targeted. An intralevel dielectric material (ILD, for example, CVD-based SiO x glass) lies between the metal lines. Both the ILD and CL are targeted as regions where the introduction of new lower-k materials will be necessary for future device performance improvements. The M1 and M2 interconnects are electrically connected through the via V1, which is processed as a continuous part of the M2 interconnect.In EM studies on DD interconnects, two current flow directions must be considered. The first electron Recent results on up-direction electromigration (EM) studies on Cu dual-damascene (DD) interconnects are presented. The issue of the DD process and its potential effect on EM reliability is described with special focus on the peculiarities of the DD interconnect architecture in comparison to the previous subtractively etched Al-based interconnect technology. Experiments performed on multilink, DD interconnects that highlight EM reliability issues, such as early failure, and the Blech effect a...

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Section: Cu Dd Versus Al(cu) Interconnectmentioning

confidence: 92%

Section: Weakest Link Approximation and Failure Distributionsmentioning

confidence: 99%

Reliability and early failure in Cu/oxide dual-damascene interconnects

Ogawa

Lee

Matsuhashi

et al. 2002

Journal of Elec Materi

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“…4,5,7 A basic unit of five interconnects in parallel serves as the smallest building block. Figure 2 depicts a top and side view of this basic unit.…”

Section: Test Structuresmentioning

confidence: 99%

“…Previous short reports on this technique have been published. 4,5 The goals of the present study are the extension of the tested sample size, the characterization of the statistical EM behavior as a function of temperature, and the detailed description of the statistical analysis. Over a temperature range from 155 to 200°C, more than 75 000 interconnects were tested without any early failure occurrences.…”

Section: Introductionmentioning

confidence: 99%

Statistical analysis of early failures in electromigration

Gall

Capasso

Jawarani

et al. 2001

Journal of Applied Physics

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The detection of early failures in electromigration (EM) and the complicated statistical nature of this important reliability phenomenon have been difficult issues to treat in the past. A satisfactory experimental approach for the detection and the statistical analysis of early failures has not yet been established. This is mainly due to the rare occurrence of early failures and difficulties in testing of large sample populations. Furthermore, experimental data on the EM behavior as a function of varying number of failure links are scarce. In this study, a technique utilizing large interconnect arrays in conjunction with the well-known Wheatstone Bridge is presented. Three types of structures with a varying number of Ti/TiN/Al(Cu)/TiN-based interconnects were used, starting from a small unit of five lines in parallel. A serial arrangement of this unit enabled testing of interconnect arrays encompassing 480 possible failure links. In addition, a Wheatstone Bridge-type wiring using four large arrays in each device enabled simultaneous testing of 1920 interconnects. In conjunction with a statistical deconvolution to the single interconnect level, the results indicate that the electromigration failure mechanism studied here follows perfect lognormal behavior down to the four sigma level. The statistical deconvolution procedure is described in detail. Over a temperature range from 155 to 200 °C, a total of more than 75 000 interconnects were tested. None of the samples have shown an indication of early, or alternate, failure mechanisms. The activation energy of the EM mechanism studied here, namely the Cu incubation time, was determined to be Q=1.08±0.05 eV. We surmise that interface diffusion of Cu along the Al(Cu) sidewalls and along the top and bottom refractory layers, coupled with grain boundary diffusion within the interconnects, constitutes the Cu incubation mechanism.

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“…Liu et al (2004) (Gall et al 1996;Gall et al 2000;Gall et al 2001) used the weakest link approach tested more than 75000 interconnects with 480…”

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confidence: 99%

Nearshore Birds in Puget Sound

Buchanan¹

2006

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Detection and analysis of early failures in electromigration

Cited by 17 publications

References 6 publications

Reliability and early failure in Cu/oxide dual-damascene interconnects

Reliability and early failure in Cu/oxide dual-damascene interconnects

Statistical analysis of early failures in electromigration

Nearshore Birds in Puget Sound

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