“…To realize the nanoFSM, we adopt a bottom-up compatible strategy using common circuit modules or tiles that are interconnected and programmed for distinct logic functions (21,22). This strategy contrasts conventional circuit designs, which require different layouts for the distinct logic elements.…”
Section: Resultsmentioning
confidence: 99%
“…1B consists of two programmable nanowire transistor arrays, where each cross-point in the arrays corresponds to a programmable transistor node having an active (transistor) or inactive (resistor) state. The output of the first array serves as the input to the second array such that the two-level NOR-logic structure of each tile can be programmed to yield complete Boolean logic (21,22), and thus the necessary arithmetic and register elements of the nanoFSM.…”
Section: Resultsmentioning
confidence: 99%
“…1B) represents a very substantial step forward in complexity compared with previous work (8)(9)(10)(11)(12)(13)(14)(15)(16)(17), given the large number of individual nanowires that must be organized in an efficient and scalable manner and the stringent demands on individual logic devices with respect to input/ output (I/O) voltage matching and control over threshold voltage variation. It also represents an experimental implementation of a bottom-up multitile or modular circuit architecture (8,(20)(21)(22)(23)(24).…”
Section: Resultsmentioning
confidence: 99%
“…As a result, implementation of a nanoelectronic FSM (nanoFSM) via bottom-up assembly of individually addressable nanoscale devices has been well beyond the state of the art. Moreover, it represents a general gap between the current single-unit circuits and modular architectures for increasing complex and functional nanoelectronic systems (8,(20)(21)(22)(23)(24). Below we describe how we overcome the above challenges in design, assembly, and circuit fabrication for the realization of a nanoFSM in programmable multitile architecture, which also provides a general paradigm for further cascading nanoelectronic systems from the bottom up.…”
Implementation of complex computer circuits assembled from the bottom up and integrated on the nanometer scale has long been a goal of electronics research. It requires a design and fabrication strategy that can address individual nanometer-scale electronic devices, while enabling large-scale assembly of those devices into highly organized, integrated computational circuits. We describe how such a strategy has led to the design, construction, and demonstration of a nanoelectronic finite-state machine. The system was fabricated using a design-oriented approach enabled by a deterministic, bottom-up assembly process that does not require individual nanowire registration. This methodology allowed construction of the nanoelectronic finite-state machine through modular design using a multitile architecture. Each tile/module consists of two interconnected crossbar nanowire arrays, with each crosspoint consisting of a programmable nanowire transistor node. The nanoelectronic finite-state machine integrates 180 programmable nanowire transistor nodes in three tiles or six total crossbar arrays, and incorporates both sequential and arithmetic logic, with extensive intertile and intratile communication that exhibits rigorous input/output matching. Our system realizes the complete 2-bit logic flow and clocked control over state registration that are required for a finite-state machine or computer. The programmable multitile circuit was also reprogrammed to a functionally distinct 2-bit full adder with 32-set matched and complete logic output. These steps forward and the ability of our unique design-oriented deterministic methodology to yield more extensive multitile systems suggest that proposed general-purpose nanocomputers can be realized in the near future.nanocomputing | nanoprocessor | logic circuits | memory I t is widely agreed (1, 2) that because of fundamental physical limits, the microelectronics industry is approaching the end of its present Roadmap (1) for the miniaturization of computer circuits based upon lithographically fabricated bulk-silicon (Si) transistors. Therefore, much effort has been invested in the nanoelectronics field for the development of novel, alternative, nanometer-scale electronic device and fabrication technologies that could serve as potential routes for ever-denser and more capable systems to enable continued technological and economic advancement (3-17). These efforts have yielded simple nanoelectronic circuits (3)(4)(5)(8)(9)(10)(11)(12)(13)(14)(15)(16)(17) and more complex circuit systems (6, 7) that use novel nanomaterials but are not integrated on the nanometer scale. In this regard, building a nanocomputer that transcends the ultimate scaling limitations of conventional semiconductor electronics has been a central goal of the nanoscience field and a long-term objective of the computing industry.A finite-state machine (FSM) is a representation for a nanocomputer in that it is a fundamental model for clocked, programmable logic circuits (18, 19) and integrates key arithmetic and memor...
“…To realize the nanoFSM, we adopt a bottom-up compatible strategy using common circuit modules or tiles that are interconnected and programmed for distinct logic functions (21,22). This strategy contrasts conventional circuit designs, which require different layouts for the distinct logic elements.…”
Section: Resultsmentioning
confidence: 99%
“…1B consists of two programmable nanowire transistor arrays, where each cross-point in the arrays corresponds to a programmable transistor node having an active (transistor) or inactive (resistor) state. The output of the first array serves as the input to the second array such that the two-level NOR-logic structure of each tile can be programmed to yield complete Boolean logic (21,22), and thus the necessary arithmetic and register elements of the nanoFSM.…”
Section: Resultsmentioning
confidence: 99%
“…1B) represents a very substantial step forward in complexity compared with previous work (8)(9)(10)(11)(12)(13)(14)(15)(16)(17), given the large number of individual nanowires that must be organized in an efficient and scalable manner and the stringent demands on individual logic devices with respect to input/ output (I/O) voltage matching and control over threshold voltage variation. It also represents an experimental implementation of a bottom-up multitile or modular circuit architecture (8,(20)(21)(22)(23)(24).…”
Section: Resultsmentioning
confidence: 99%
“…As a result, implementation of a nanoelectronic FSM (nanoFSM) via bottom-up assembly of individually addressable nanoscale devices has been well beyond the state of the art. Moreover, it represents a general gap between the current single-unit circuits and modular architectures for increasing complex and functional nanoelectronic systems (8,(20)(21)(22)(23)(24). Below we describe how we overcome the above challenges in design, assembly, and circuit fabrication for the realization of a nanoFSM in programmable multitile architecture, which also provides a general paradigm for further cascading nanoelectronic systems from the bottom up.…”
Implementation of complex computer circuits assembled from the bottom up and integrated on the nanometer scale has long been a goal of electronics research. It requires a design and fabrication strategy that can address individual nanometer-scale electronic devices, while enabling large-scale assembly of those devices into highly organized, integrated computational circuits. We describe how such a strategy has led to the design, construction, and demonstration of a nanoelectronic finite-state machine. The system was fabricated using a design-oriented approach enabled by a deterministic, bottom-up assembly process that does not require individual nanowire registration. This methodology allowed construction of the nanoelectronic finite-state machine through modular design using a multitile architecture. Each tile/module consists of two interconnected crossbar nanowire arrays, with each crosspoint consisting of a programmable nanowire transistor node. The nanoelectronic finite-state machine integrates 180 programmable nanowire transistor nodes in three tiles or six total crossbar arrays, and incorporates both sequential and arithmetic logic, with extensive intertile and intratile communication that exhibits rigorous input/output matching. Our system realizes the complete 2-bit logic flow and clocked control over state registration that are required for a finite-state machine or computer. The programmable multitile circuit was also reprogrammed to a functionally distinct 2-bit full adder with 32-set matched and complete logic output. These steps forward and the ability of our unique design-oriented deterministic methodology to yield more extensive multitile systems suggest that proposed general-purpose nanocomputers can be realized in the near future.nanocomputing | nanoprocessor | logic circuits | memory I t is widely agreed (1, 2) that because of fundamental physical limits, the microelectronics industry is approaching the end of its present Roadmap (1) for the miniaturization of computer circuits based upon lithographically fabricated bulk-silicon (Si) transistors. Therefore, much effort has been invested in the nanoelectronics field for the development of novel, alternative, nanometer-scale electronic device and fabrication technologies that could serve as potential routes for ever-denser and more capable systems to enable continued technological and economic advancement (3-17). These efforts have yielded simple nanoelectronic circuits (3)(4)(5)(8)(9)(10)(11)(12)(13)(14)(15)(16)(17) and more complex circuit systems (6, 7) that use novel nanomaterials but are not integrated on the nanometer scale. In this regard, building a nanocomputer that transcends the ultimate scaling limitations of conventional semiconductor electronics has been a central goal of the nanoscience field and a long-term objective of the computing industry.A finite-state machine (FSM) is a representation for a nanocomputer in that it is a fundamental model for clocked, programmable logic circuits (18, 19) and integrates key arithmetic and memor...
“…[3][4][5]19,20 To this end, we recently introduced a dielectric charge-trapping shell structure on nanowire transistor elements and showed that by modulating the charge state in the dielectric layers the transistor could be programmed as "active" or "inactive" within a specific logic window. Integration of these nanowire device elements into a crossbar array 19,20 further yielded a basic module or tile that could be used for proposed array-based architecture.…”
Programmable logic arrays (PLA) constitute a promising architecture for developing increasingly complex and functional circuits through nanocomputers from nanoscale building blocks. Here we report a novel one-dimensional PLA element that incorporates resistive switch gate structures on a semiconductor nanowire and show that multiple elements can be integrated to realize functional PLAs. In our PLA element, the gate coupling to the nanowire transistor can be modulated by the memory state of the resistive switch to yield programmable active (transistor) or inactive (resistor) states within a welldefined logic window. Multiple PLA nanowire elements were integrated and programmed to yield a working 2-to-4 demultiplexer with long-term retention. The well-defined, controllable logic window and long-term retention of our new one-dimensional PLA element provide a promising route for building increasingly complex circuits with nanoscale building blocks.
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