Designing Polymorphic Circuits with Evolutionary Algorithm Based on Weighted Sum Method

Liang, Houjun; Luo, Wenjian; Wang, Xufa

doi:10.1007/978-3-540-74626-3_32

Cited by 7 publications

(2 citation statements)

References 9 publications

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“…CGP is capable of evolving very area-efficient multifunctional circuits, however, the approach evaluating 2 n input assignments for n-input circuits is not scalable [14], [5], [15]. Only small polymorphic FIR filters were designed using this method [16].…”

Section: Multifunctional Circuitsmentioning

confidence: 99%

Two-step evolution of polymorphic circuits for image multi-filtering

Sekanina¹,

Salajka²,

Vašíček³

2012

2012 IEEE Congress on Evolutionary Computation

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This paper proposes to implement multifunctional image filters using multifunctional gates such as polymorphic gates or multiplexed ordinary gates. The design procedure is based on evolutionary design and optimization conducted using Cartesian genetic programming (CGP). Because of the complexity of the problem the design is decomposed to two phases. In the first step, a multifunctional filter is evolved at the registertransfer level (RTL) using a set of processing elements containing functions such as minimum/maximum, minimum/average etc. over two pixels. In the second step, gate-level implementations of the processing elements utilized in evolved filters are designed and optimized using CGP in combination with conventional logic synthesis tools. It is shown that resulting filters exhibit good filtering capabilities. They are also area-efficient in comparison with solutions based on multiplexing of ordinary filters.

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Section: Multifunctional Circuitsmentioning

confidence: 99%

Two-step evolution of polymorphic circuits for image multi-filtering

Sekanina¹,

Salajka²,

Vašíček³

2012

2012 IEEE Congress on Evolutionary Computation

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“…Evolutionary synthesis is one of the proposed schemes that intend to automatically design circuits that switch functions (for example, Multiplier/Sorter) according to environmental stimuli, such as temperature. This scheme optimizes a very redundant initialized circuit containing all candidate functions by evolutionary algorithms in terms of the number of gates [23][24][25][26][27][28]. Unfortunately, no improvement in terms of the area has been reported compared to the standalone implementation of those functions even in the latest results [28].…”

Section: Introductionmentioning

confidence: 99%

Towards Area Efficient Logic Circuit: Exploring Potential of Reconfigurable Gate by Generic Exact Synthesis

Shang

Naeemi

Pan

2023

IEEE Open J. Comput. Soc.

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In this paper, we propose a generic design methodology to achieve area-efficient reconfigurable logic circuits by using exact synthesis based on Boolean satisfiability (SAT) solver. The proposed methodology better leverages the high representation ability of emerging reconfigurable logic gates (RLGs) to achieve reconfigurable circuits with fewer gates. In addition, we propose a fence-based acceleration method to provide >10× speed up for the synthesis without an observable loss of optimality. Furthermore, four sets of RLGs are developed based on a recently proposed valley-spin device as a case study to demonstrate the advantage of the proposed circuit. Simulations have been performed to analyze the impact of the fence searching algorithm and combination of operators. Based on disjointsupport decomposable (DSD) benchmarks, up to 38% and 73% reductions are observed in the area and energy-delay-area product (EDAP), respectively, compared to CMOS counterparts. Compared to the two existing synthesis methods, the proposed scheme provides 40% and 26.3% reduction in EDAP based on MCNC benchmark.

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Evolutionary repair for evolutionary design of combinational logic circuits

Zhang

Luo

2012

2012 IEEE Congress on Evolutionary Computation

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Designing Polymorphic Circuits with Evolutionary Algorithm Based on Weighted Sum Method

Cited by 7 publications

References 9 publications

Two-step evolution of polymorphic circuits for image multi-filtering

Two-step evolution of polymorphic circuits for image multi-filtering

Towards Area Efficient Logic Circuit: Exploring Potential of Reconfigurable Gate by Generic Exact Synthesis

Evolutionary repair for evolutionary design of combinational logic circuits

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