Designing low-power digital CMOS

Abstract

The increasing levels of circuit integration are leading to the implementation of highly sophisticated algorithms. Many of the commercial application areas have a requirement for portability which leads to the need for low-power design. This article considers the issues and design solutions for complex low-power digital CMOS IC design.

Power Gating Structure for Reversible Programmable Logic Array

“…There are PMOS and NMOS transistors in the CMOS (Complementary metal oxide semiconductor) design of the circuits as pull-up and pull-down and both the transistors contributing equally in the circuit operation [5] & the major cause of power dissipation in the digital circuits are following [5][6] [7][10]:…”

Performance analysis of low-power 1-bit CMOS full adder cells

“…In some of these stages there are guidelines that are clear and there are steps to follow that reduce power consumption, such as decreasing the power-supply voltage. While in other stages there are no clear steps to follow, so statistical or probabilistic heuristic methods are used to estimate the power consumption of a given design [1], [2].…”

Projeto e desenvolvimento de uma arquitetura de baixo consumo de potência para microprocessadores.

“…Os sistemas estão mais complexos, demandando cada vez mais transistores integrados para a realização de suas tarefas, fazendo-se necessário o aumento da energia para alimentar esses circuitos [1]. Apesar de a tecnologia de fabricação ter evoluído bastante com a redução do comprimento de canal dos transistores (Figura 1), reduzindo o consumo desses transistores, ainda existe grande necessidade de tornar os dispositivos mais eficientes, no que diz respeito ao consumo de potência [2] [3].…”

“….ipp_do_scan_pta ({6'b000000, ipt_test_scan_out_sog [2], 1'b0}), .scan_sre_override_pta ({6'b000000, 2{sim_scan_mode}}), .scan_tri_pta ({2'b00, 6{sim_iddq_test_enable}}), .scan_pin_sel_pta (8'b00000010), .test_ife_override_pta (8{sim_test_ife_override}) // ******************************************************** // MOD6 // ******************************************************** .ipp_ana_en_mod6_pta (8'b00000000), .ipp_port_en_mod6_pta ({1'b0, sim_ipp_port_en_pcout, 4'b0000, ipp_port_en_test_clk_mux, 1'b0}), .ipp_ind_mod6_pta (ipp_ind_mod6_pta_nc [7..0]), .ipp_obe_mod6_pta (8'b01000010), .ipp_do_mod6_pta ({1'b0, ipg_clk, 4'b0000, extclk_tpm, 1'b0}), .ipp_ode_mod6_pta…”