Designing Efficient and High-Performance AI Accelerators With Customized STT-MRAM

Mishty, Kaniz; Sadi, Mehdi

doi:10.1109/tvlsi.2021.3105958

Cited by 14 publications

(2 citation statements)

References 33 publications

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“…Sixth, spin-transfer torque magnetoresistive RAM (STT-MRAM) that has the potential to replace DRAM has not shown vulnerable to rowhammer yet. Therefore, the bit-flip-based adversarial attack is not possible for STT-MRAM-based DNN accelerators [49].…”

Section: Bit-flip Attackmentioning

confidence: 99%

Attacking Deep Learning AI Hardware with Universal Adversarial Perturbation

Sadi,

Talukder,

Mishty

et al. 2023

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Universal adversarial perturbations are image-agnostic and model-independent noise that, when added to any image, can mislead the trained deep convolutional neural networks into the wrong prediction. Since these universal adversarial perturbations can seriously jeopardize the security and integrity of practical deep learning applications, the existing techniques use additional neural networks to detect the existence of these noises at the input image source. In this paper, we demonstrate an attack strategy that, when activated by rogue means (e.g., malware, trojan), can bypass these existing countermeasures by augmenting the adversarial noise at the AI hardware accelerator stage. We demonstrate the accelerator-level universal adversarial noise attack on several deep learning models using co-simulation of the software kernel of the Conv2D function and the Verilog RTL model of the hardware under the FuseSoC environment.

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Section: Bit-flip Attackmentioning

confidence: 99%

Attacking Deep Learning AI Hardware with Universal Adversarial Perturbation

Sadi,

Talukder,

Mishty

et al. 2023

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“…The logic-in-memory (LIM) architecture is gaining attention owing to its space-saving structure and increased energy efficiency on integrating logic processes and data storage [4]. Most studies on LIM utilize emerging memories, such as resistive random-access memory (ReRAM) [5,6], spin-transfer torque RAM (STT-RAM) [7,8], and ferroelectric field-effect transistors (FEFETs) [9,10]. However, they comprise non-silicon components that are expensive and require additional fabrication procedures.…”

Section: Introductionmentioning

confidence: 99%

Design and Simulation of Logic-In-Memory Inverter Based on a Silicon Nanowire Feedback Field-Effect Transistor

et al. 2022

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In this paper, we propose a logic-in-memory (LIM) inverter comprising a silicon nanowire (SiNW) n-channel feedback field-effect transistor (n-FBFET) and a SiNW p-channel metal oxide semiconductor field-effect transistor (p-MOSFET). The hybrid logic and memory operations of the LIM inverter were investigated by mixed-mode technology computer-aided design simulations. Our LIM inverter exhibited a high voltage gain of 296.8 (V/V) when transitioning from logic ‘1’ to ‘0’ and 7.9 (V/V) when transitioning from logic ‘0’ to ‘1’, while holding calculated logic at zero input voltage. The energy band diagrams of the n-FBFET structure demonstrated that the holding operation of the inverter was implemented by controlling the positive feedback loop. Moreover, the output logic can remain constant without any supply voltage, resulting in zero static power consumption.

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